Current Conveyor Circuit for Fast, Stable Current Comparison
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Solution Overview
Problem
Current conveyor circuits face limitations in accurately comparing input currents due to small output currents and fluctuations in reference voltage, leading to slow and inaccurate detection of current differences.
Innovation Solution
The method involves using a system with two current conveyor circuits and an adder to sum positive and negative transistor currents, coupled with a differential amplifier to maintain a constant voltage output and compare currents, while using inverters with unity feedback to stabilize reference voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the input current applied to the X terminal is much smaller than the reference current driven through the current conveyor circuit, then the input current is accurately conveyed to the Z terminal, but the input current and output current are usually small making current comparison slow and inaccurate
Solution Approach 1:
The current conveyor circuit is divided into positive and negative transistor current paths that are processed separately and then combined. This segmentation allows each path to handle current accurately while the combined output provides sufficient signal strength for fast and accurate comparison.
Solution Approach 2:
The patent combines the output currents from multiple current conveyor circuits using an adder circuit. By merging multiple small current signals, the system achieves both accurate conveyance of individual currents and sufficient total current magnitude for fast comparison.
2Reliability
If the reference voltage applied to the Y terminal does not remain constant due to temperature variations, then the overall functionality of the current conveyor circuit is adversely affected and input current fluctuates, but maintaining constant reference voltage requires additional stabilization mechanisms
Solution Approach 1:
The patent employs feedback mechanisms where the output currents are summed and fed back to maintain constant voltage conditions. This feedback loop automatically compensates for temperature-induced reference voltage variations without requiring complex external stabilization circuits.
Solution Approach 2:
The current conveyor circuit is designed to self-compensate for reference voltage fluctuations through its inherent current summation and feedback mechanism. The system uses its own output signals to maintain stable operation, reducing the need for external voltage regulation components.
3Productivity
If larger input currents are applied to the X terminal to improve comparison speed, then current comparison becomes faster, but the input current is no longer much smaller than the reference current causing inaccurate conveyance to the Z terminal
Solution Approach 1:
The system segments the current processing into multiple parallel paths with positive and negative transistor currents. Each path maintains the accurate conveyance condition (input current much smaller than reference current) while the combined output provides large signal magnitude for fast comparison.
Solution Approach 2:
Multiple current conveyor circuits process smaller currents accurately and their outputs are merged through an adder. This combining allows the system to achieve both high-speed operation and accurate current conveyance by distributing the total current load across multiple accurate sub-circuits.
Data Source
AI summary
Methods and systems are provided for comparing currents. The method includes driving a first current through a first X leg of a first current conveyor circuit and a second current through a second X leg of a second current conveyor circuit. The method further includes draining a third current from a first X terminal of the first current conveyor circuit to produce a first positive transistor current and a first negative transistor current, and draining a fourth current from a second X terminal of the second current conveyor circuit to produce a second positive transistor current and a second negative transistor current. The method further includes summing the first positive transistor current and the second negative transistor current to produce a first current output, the first negative transistor current and the second positive transistor current to produce a second current output, and the first current output and the second current output to produce a summed current output.