Current Conveyor Circuit Push-Pull Source Follower Input Voltage Dynamics
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Solution Overview
Problem
Current conveyor circuits in touch-screen controllers face challenges with limited input voltage dynamic range, high output current noise, and high power consumption, particularly when dealing with high capacitance and large transconductance requirements.
Innovation Solution
The implementation of a current conveyor with a push-pull source follower solution using cascade transistors and current generators, which avoids diode-connected transistors to enhance input voltage dynamics and reduce output current noise, while maintaining low power consumption through independent biasing of output transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If diode-connected transistors are used in conventional current conveyor circuits, then the circuit structure is simplified, but the input voltage dynamic range is limited
Solution Approach 1:
The patent removes diode-connected transistors from the current conveyor circuit structure. By extracting this component, the circuit achieves wider input voltage dynamic range while maintaining functional simplicity through alternative transistor configurations that do not require diode connections.
2Productivity
If high transconductance is used to handle high capacitance, then the capacitance-to-charge conversion capability is improved, but the output current noise increases
Solution Approach 1:
The patent implements different transconductance values for different transistor stages within the current conveyor circuit. By applying local quality differentiation, specific stages are optimized for high transconductance to handle capacitance conversion, while other stages use lower transconductance to minimize noise generation, thus resolving the contradiction between conversion capability and noise reduction.
3Adaptability or versatility
If high power is consumed to drive high capacitance and achieve wide dynamic range, then the performance is improved, but the power consumption increases
Solution Approach 1:
The patent employs dynamic biasing techniques where transistor operating points are optimized to achieve wide input voltage dynamic range only when needed, rather than maintaining high power consumption continuously. The circuit adapts its power consumption levels based on operating conditions, allowing wide dynamic range performance while reducing overall power consumption through dynamic operation rather than static high-power design.
Data Source
AI summary
A circuit includes a first transistor having a control terminal and a current path between first and second current path terminals. A second transistor has a control terminal and a current path between first and second current path terminals. The first current path terminal of the first transistor is coupled to the first current path terminal of the second transistor at an intermediate point. A first current buffer has an input and an output. The input of the first current buffer is coupled to the second current path terminal of the first transistor. A second current buffer has an input and an output, the input of the second current buffer being coupled to the second current path terminal of the second transistor. A summation node is coupled to the outputs of the first and second current buffer.