Current DAC With Distributed Filtering for Harmonic Suppression
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Solution Overview
Problem
Conventional digital-to-analog converters (DACs) face challenges in suppressing high frequency harmonics in their analog output signals, which can degrade system performance and increase power consumption or introduce offset and non-linearity when using interpolation filters or passive/reconstruction filters.
Innovation Solution
The implementation of distributed reconstruction filtering in DACs, where low-pass filter elements are coupled to each DAC element, combining digital-to-analog conversion and low-pass filtering functions, effectively attenuates high frequency components during conversion by introducing notches in the frequency response at multiples of the clock signal frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional filtering techniques (interpolation or low-pass filtering) are used to suppress high frequency harmonics, then harmonic suppression is improved, but power consumption and area increase
Solution Approach 1:
The patent combines the DAC function and low-pass filtering function into a single integrated circuit. The DAC elements generate analog signals while simultaneously, filter capacitors connected to each DAC element perform low-pass filtering to suppress high frequency harmonics. This merging eliminates the need for separate filtering circuits, thereby reducing power consumption and area while maintaining effective harmonic suppression.
2Object-affected harmful factors
If passive reconstruction filter is used to suppress high frequency harmonics, then harmonic suppression is improved, but output impedance increases
Solution Approach 1:
The patent integrates low-pass filtering capability directly into the DAC structure through filter capacitors connected to each DAC element. This combined DAC-filter circuit maintains low output impedance characteristic of DACs while simultaneously suppressing high frequency harmonics, resolving the contradiction between harmonic suppression and output impedance maintenance.
3Object-affected harmful factors
If active filter is used to suppress high frequency harmonics, then harmonic suppression is improved, but offset and non-linearity increase
Solution Approach 1:
The patent combines DAC elements with passive filter capacitors in an integrated circuit, creating a unified DAC-filter structure. This approach uses passive filtering rather than active filtering, thereby suppressing high frequency harmonics without introducing offset or increasing non-linearity, thus maintaining high signal accuracy and linearity.
4Object-affected harmful factors
If digital input signal is interpolated to suppress high frequency signals, then harmonic suppression is improved, but DAC update rate increases requiring higher clock frequency
Solution Approach 1:
The patent integrates low-pass filtering directly in the analog domain within the DAC circuit itself, using filter capacitors connected to each DAC element. This eliminates the need for digital interpolation, allowing the DAC to operate at lower clock frequencies while still effectively suppressing high frequency harmonics in the analog output signal.
Data Source
AI summary
A method for digital-to-analog signal conversion with distributed reconstructive filtering includes receiving a digital code synchronous to a clock signal having a first frequency, determining next states of a plurality of digital-to-analog current elements based on the digital code, combining a plurality of currents to generate an output current, and generating the plurality of currents. Each of the plurality of currents is based on a corresponding control signal of a plurality of control signals. The method includes generating the plurality of control signals based on the next states of the plurality of digital-to-analog current elements. Each of the plurality of control signals selects a first voltage level, a second voltage level, or a transitioning voltage level for use by a corresponding digital-to-analog current element. The transitioning voltage level linearly transitions from the first voltage level to the second voltage level over a predetermined number of periods of the clock signal.


