Current DAC Using Error Amplifiers to Reduce Die Size

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Solution Overview

Problem

Current digital-to-analog converters (DACs) face challenges with increased die size due to the need for cascoded current mirror branches and limited maximum drain-to-source voltage, which complicates their operation and minimization of die size in wireless terminals.

Innovation Solution

A current DAC design that eliminates the need for cascoded current mirror branches and increases the maximum drain-to-source voltage without increasing the width of current mirror FETs, utilizing a switchable resistor network and error amplifiers to equalize voltages and control current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cascoded current mirror branches are used to reduce variations in DAC output current, then output current stability is improved, but die size significantly increases

Engineering Contradiction:
Improveoutput current stabilityVSAvoiddie size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent introduces error amplifiers as intermediary components that detect voltage variations at the output node and generate corrective signals to compensate for these variations. This mediator approach stabilizes the output current without requiring cascoded transistor structures, thereby maintaining current stability while avoiding the significant die size increase that would result from cascoding all current mirror branches.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If width of current mirror FETs is increased to increase maximum drain-to-source voltage, then maximum drain-to-source voltage is improved, but device dimensions increase

Engineering Contradiction:
Improvemaximum drain-to-source voltageVSAvoidFET width
Core Design Contradiction:
Adaptability or versatilityVSLength of moving object

Solution Approach 1:

The patent implements feedback mechanisms where error amplifiers continuously monitor the output voltage and adjust the current mirror operation accordingly. This feedback control enables the system to maintain proper operation across a wider range of drain-to-source voltages without requiring increased FET width, thus achieving voltage adaptability while keeping device dimensions compact.

Inventive Principle:
Principle #23Feedback

3Reliability

If voltage drop across FETs is increased to ensure proper operation, then operational reliability is improved, but output voltage range is reduced

Engineering Contradiction:
Improveoperational reliabilityVSAvoidoutput voltage range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

Error amplifiers serve as intermediary components that enable the system to maintain reliable operation with smaller voltage drops across the FETs. By actively detecting and compensating for voltage variations, the error amplifiers allow the DAC to operate reliably across a broader output voltage range than would be possible with passive voltage drop requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8410966B2Current DAC
Publication Date: 2013.04.02 QORVO US INC
  • US8410966B2 patent drawing
  • US8410966B2 patent drawing
  • US8410966B2 patent drawing

AI summary

A current digital-to-analog converter (DAC) is disclosed. The current DAC includes a current reference circuit coupled between a voltage source terminal and a voltage node, wherein the current reference circuit includes a feedback node. A switchable resistor network is communicably coupled to the feedback node of the current reference circuit via a first feedback network that is adapted to equalize a first voltage across the switchable resistor network voltage with a second voltage between the feedback node and the voltage node. A current mirror includes an output node communicably coupled to the switchable resistor network via a second feedback network that is adapted to equalize an output current that flows from the output node with an input current that flows into the switchable resistor network.