Current Detection Circuit Low Power NMOS Reference
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Solution Overview
Problem
Existing current detection circuits consume high current due to the configuration of the voltage comparison circuit, which includes a differential amplifier circuit and a buffer circuit, resulting in inefficient power usage.
Innovation Solution
A current detection circuit utilizing a reference voltage circuit with two NMOS transistors of different threshold voltages and a resistor, along with a comparison output circuit comprising a PMOS transistor, an NMOS transistor, and a measuring resistor, reduces current paths from the power supply to GND, eliminating the need for a voltage comparison circuit and thereby minimizing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a voltage comparison circuit including a differential amplifier circuit and a buffer circuit is used, then accurate voltage comparison can be achieved, but current consumption becomes large
Solution Approach 1:
The patent extracts and removes the differential amplifier circuit and buffer circuit from the voltage comparison circuit. By eliminating these high current-consumption components, the invention achieves voltage comparison functionality through a simplified circuit configuration that uses transistors and resistors in a different arrangement, thereby resolving the contradiction between measurement precision and current consumption.
Solution Approach 2:
The patent creates a simplified copy of the voltage comparison function using alternative circuit elements. Instead of using the conventional differential amplifier and buffer circuit, the invention implements voltage comparison through a transistor-based circuit that replicates the essential comparison functionality while consuming significantly less current.
2Reliability
If a conventional voltage comparison circuit is used, then reliable current detection can be achieved, but the number of current paths from power supply to GND increases
Solution Approach 1:
The patent removes unnecessary circuit components including the differential amplifier and buffer circuit from the conventional voltage comparison circuit. This extraction simplifies the overall circuit configuration while maintaining current detection reliability through the alternative transistor-based comparison mechanism.
Solution Approach 2:
The patent segments the voltage comparison circuit into simpler functional blocks using individual transistors and resistors. By dividing the comparison function into discrete transistor-level operations rather than using integrated differential amplifier blocks, the circuit achieves both simplified configuration and reduced current paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution significantly reduces current consumption by eliminating unnecessary current paths, allowing for efficient detection of currents flowing through the current measuring resistor while maintaining accurate detection capabilities.
Implementation Method 1
a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor
Implementation Method 2
a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result
Data Source
AI summary
To provide a current detection circuit capable of detecting with low current consumption that a prescribed current flows into a current measuring resistor. A current detection circuit is equipped with a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor, and a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result.


