Current Differential Protection Clock Synchronization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power system protection systems face challenges in accurately synchronizing sampling clocks across multiple locations due to communication delays and clock rollover issues, leading to errors in fault detection and potential false tripping of circuit breakers.

Innovation Solution

A current differential protection system utilizing a dual range clock and phase-frequency locked loop (PFLL) for clock synchronization, which compensates for communication delays and rollover errors by adjusting clock frequencies and averaging time delays across terminals, ensuring synchronized clock operation without relying on GPS.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If digital communications are used to synchronize sampling clocks at remote locations, then clock synchronization is achieved, but uncertainties in message delivery time cause accuracy limitations and errors

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidmessage delivery time uncertainty
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where each terminal measures the time delay for communication messages to travel to and from other terminals. These measured delays are fed back into the synchronization algorithm, which uses them to compensate for transmission uncertainties and calculate accurate synchronized time stamps, thereby resolving the accuracy limitation caused by message delivery time uncertainties

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces communication message exchange as an intermediary mechanism to measure and characterize the time delay between terminals. By using these messages as mediators to probe the communication channel, the system can determine actual transmission times and use this information to correct synchronization errors, transforming the uncertainty into a measurable and compensatable parameter

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If clocks with limited bits are used to save communication bandwidth, then communication efficiency is improved, but clock rollover occurs frequently making multi-terminal clocks converge to a stable but non-synchronized status

Engineering Contradiction:
Improvecommunication bandwidth efficiencyVSAvoidclock synchronization stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses communication messages as intermediaries to carry time stamp information that spans across clock rollover boundaries. By measuring the time delay between sent and received messages and using this measurement to calculate synchronized timestamps, the system can accurately determine relative timing even when clocks roll over, maintaining synchronization reliability despite using limited-bit clocks

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback by continuously measuring communication delays and using these measurements to adjust and maintain synchronized timestamps across terminals. This feedback mechanism ensures that even when clocks roll over independently, the terminals can converge to a synchronized state by compensating for their relative time offsets based on measured delay information

Inventive Principle:
Principle #23Feedback

3Measurement precision

If GPS is used for clock synchronization, then accurate synchronization is achieved, but additional hardware is required increasing system cost

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidhardware requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent enables the power system terminals to synchronize their own clocks using only the existing communication infrastructure between them. Each terminal measures communication delays and calculates synchronized timestamps autonomously without requiring external GPS hardware, making the system self-sufficient and eliminating the need for additional synchronization equipment

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses communication messages as intermediaries to establish time references between terminals. Instead of relying on external GPS signals, the system uses the existing communication channel itself as the reference medium, measuring round-trip message delays to establish accurate relative timing without requiring any external hardware aids

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables precise synchronization of clocks across multiple terminals, reducing false fault detections and ensuring reliable operation of power systems by accurately aligning current measurements and maintaining system stability.

Implementation Method 1

A current differential protection system utilizing a dual range clock and phase-frequency locked loop (PFLL) for clock synchronization

Methodology Applied
Scientific EffectPhase-frequency locked loop:

Data Source

PatentEP2728693B1Current differential protection
Publication Date: 2016.04.06 GENERAL ELECTRIC CO
  • EP2728693B1 patent drawingFigure 1
  • EP2728693B1 patent drawingFigure 2~3
  • EP2728693B1 patent drawingFigure 4~5B

AI summary

A current differential protection system for a multi-terminal power line includes a current sensor for sensing a current at a local terminal, a controller (80) for time synchronizing the local terminal and remote terminals, and a fault detection module (98) to detect a fault in the multi-terminal power line if a differential current exceeds a threshold value. The controller (80) includes a time measurement exchange module (94) for exchanging time stamp data with remote terminals, an upper range clock for exchanging time stamp data with remote terminals and a lower range clock for indexing the current at the local terminal. A first time period of the upper range clock is N times a second time period of the lower range clock where N is a number of multi-terminals. The controller (80) includes a clock offset calculation module for determining an average time offset based on time stamp data from remote terminals and the local terminal.