Current Limit Peak Regulation Circuit for Power Converter

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Solution Overview

Problem

Flyback power converters face challenges in reducing standby power dissipation and noise during sleep mode, as simply decreasing switching frequency is insufficient to meet low power loss and low noise requirements.

Innovation Solution

A current limit peak regulation circuit that adjusts the maximum allowable peak current threshold based on switching frequency, using a control module with a current limit comparator and constant voltage mode control circuit to manage the main switch's operation, ensuring reduced current flow during lower frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the switching frequency is decreased to reduce power loss, then the power dissipation is reduced, but the current limit cannot be sufficiently controlled to meet low noise requirements

Engineering Contradiction:

Improvepower dissipationVSAvoidnoise

Core Design Contradiction:

Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The patent changes the current limit threshold parameter dynamically based on switching frequency. When switching frequency decreases below a threshold frequency, the current limit threshold is reduced proportionally, ensuring that both power dissipation and noise are controlled effectively in sleep mode

Inventive Principle:

Principle #35Parameter changes

2Loss of energy

If the switching frequency is decreased in sleep mode, then the power loss is reduced, but the current flow control is insufficient to meet low standby power dissipation requirements

Engineering Contradiction:

Improvepower lossVSAvoidstandby power dissipation

Core Design Contradiction:

Loss of energyVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic parameter adjustment by modifying the current limit threshold based on switching frequency. In sleep mode, when frequency drops below the threshold, the current limit is reduced, thereby controlling standby power dissipation effectively

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If the current limit threshold is kept constant, then the control circuit is simple, but the maximum current cannot be reduced at lower switching frequencies to reduce power dissipation

Engineering Contradiction:

Improvecontrol circuitVSAvoidpower dissipation

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

The patent transforms the static current limit threshold into a dynamic parameter that adjusts with switching frequency. The control circuit monitors frequency and automatically adjusts the current limit threshold, achieving energy reduction without excessive complexity

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9998022B2Current limit peak regulation circuit for power converter with low standby power dissipation

Publication Date: 2018.06.12 CHENGDU MONOLITHIC POWER SYST

AI summary

A current limit peak regulation circuit, a current limit circuit and a power converter including the current limit peak regulation circuit. The current limit peak regulation circuit provides a current limit threshold to limit a maximum allowable peak current value of a current flowing through a main switch of the power converter and adjusts the current limit threshold to decrease with decrease in a switching frequency of the power converter when the power converter is in a constant voltage mode so as to reduce power dissipation of the power converter in standby mode.