Integrated Circuit Current Limit Clamps and Skip Clamps

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Solution Overview

Problem

Conventional DC-to-DC voltage converters require separate reference and feedback paths for current-limit and skip modes, leading to complex trimming processes and inefficiencies, especially in managing over-current and skip conditions.

Innovation Solution

The integration of current-limit and skip clamps with a shared reference path and feedback path, utilizing a voltage-to-current circuit to generate feedback signals for clamping, allows for fast and accurate regulation of inductor current without exceeding current limit clamp voltage or falling below skip clamp voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate reference and feedback paths are used for current-limit and skip modes, then the converter can manage over-current and skip conditions independently, but the trimming process becomes complex and the device structure becomes more complicated

Engineering Contradiction:
Improveover-current and skip condition managementVSAvoidreference and feedback paths structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines separate reference and feedback paths into a shared path structure. The error amplifier output serves as a common node that simultaneously provides reference for both current-limit clamping and skip mode clamping operations, eliminating the need for separate trimming circuits and reducing overall device complexity while maintaining independent control of both modes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The error amplifier output node is designed to serve multiple functions: it provides the reference voltage for the current-limit clamp, the reference voltage for the skip mode clamp, and the feedback signal for inductor current regulation. This multi-functional design reduces the number of separate components and simplifies the overall circuit architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If conventional separate paths are used for current-limit and skip modes, then each mode can be controlled independently, but the trimming process becomes time-consuming and complex

Engineering Contradiction:
Improvemode control independenceVSAvoidtrimming process time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent merges the trimming operations into a single process by using a shared error amplifier output node. Both current-limit and skip mode clamps derive their reference voltages from this common node, allowing both trimming operations to be performed simultaneously through a single adjustment process rather than requiring separate sequential trimming steps

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If a single feedback path is used for both current-limit and skip modes, then device complexity is reduced, but the accuracy of current regulation must be maintained for both modes

Engineering Contradiction:
Improvefeedback path structureVSAvoidinductor current regulation accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent employs the error amplifier to continuously monitor the inductor current through its feedback path and dynamically adjust the control signal to maintain accurate current regulation. The error amplifier compares the actual current with the reference voltage and generates corrective signals that ensure both current-limit and skip mode clamps operate with high precision despite sharing a common feedback path

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10965216B2Integrated circuits with current limit clamps and skip clamps for power converters
Publication Date: 2021.03.30 TEXAS INSTRUMENTS INC
  • US10965216B2 patent drawing
  • US10965216B2 patent drawing
  • US10965216B2 patent drawing

AI summary

An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.