Current Limiting Circuit for Semiconductor Memory Device
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistance varying memory devices face challenges in uniformizing variable resistor characteristics, leading to difficulties in setting operations and potential for mistaken resetting or destruction of memory cells due to excessive current, and large variations in resistance values among memory cells after forming operations.
Innovation Solution
A semiconductor memory device with a memory cell array and a current limiting circuit that sets a compliance current for each memory cell based on its individual characteristics, using a current generating circuit and current mirror circuits to control the cell current and prevent excessive flow, thereby enabling proper setting and resetting operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If an identical compliance current is set for all memory cells, then the device complexity is reduced, but the reliability deteriorates due to mistaken resetting operations and destruction of memory cells with varying resistance characteristics
Solution Approach 1:
The patent divides the memory cell array into multiple blocks, where each block contains memory cells with similar resistance characteristics. A separate compliance current control circuit is provided for each block, allowing independent optimization of compliance current for each block based on its specific characteristics. This segmentation approach resolves the contradiction by enabling reliable individualized control without requiring complex cell-by-cell control circuits.
Solution Approach 2:
The patent implements a forming operation that is performed in advance on each memory cell to initialize its resistance characteristics. During this preliminary action, the resistance variation among memory cells is reduced, and subsequent compliance current values are determined based on the resistance characteristics established during forming. This preliminary characterization enables more accurate compliance current setting without increasing operational complexity.
2Ease of manufacture
If the resistance value of variable resistors is allowed to vary freely, then the ease of manufacture is improved, but the manufacturing precision deteriorates due to large resistance variations after forming operations
Solution Approach 1:
The patent implements a forming operation that is performed in advance on each memory cell to initialize its resistance characteristics. During this preliminary action, a forming voltage is applied to create a conductive path through the variable resistor, and the resistance variation among memory cells is reduced. This preliminary action occurs during manufacturing, allowing easy fabrication while achieving better resistance uniformity before the memory cells are put into service.
Solution Approach 2:
The patent changes the resistance parameter of variable resistors through the forming operation, which applies a high voltage to transform the initial high-resistance state into a stable low-resistance state with controlled variability. This parameter transformation occurs during manufacturing, enabling the variable resistors to achieve their operational resistance values with reduced variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for accurate setting of compliance currents for each memory cell, preventing mistaken resetting and destruction, and reducing resistance variations, thus improving the reliability and efficiency of memory cell operations.
Implementation Method 1
a current mirror circuit configured to mirror the cell current to a current path supplying the first voltage to the plurality of first lines
Data Source
AI summary
A control circuit applies a first voltage to selected one of first lines and applies a second voltage having a voltage value smaller than that of the first voltage to selected one of second lines, such that a certain potential difference is applied across a memory cell disposed at an intersection of the selected one of the first lines and the selected one of the second lines. A current limiting circuit sets a compliance current defining an upper limit of a cell current flowing in the memory cell, and controls such that the cell current flowing in the memory cell does not exceed the compliance current. The current limiting circuit comprises a current generating circuit and a first current mirror circuit. The current generating circuit generates a first current having a current value equal to a current value of the cell current at a certain timing multiplied by a certain constant. The first current mirror circuit mirrors the first current to a current path supplying the first voltage to the first lines.