Current Mirror Bias Network for Stable Quiescent Current
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Solution Overview
Problem
Existing semiconductor biasing circuits face challenges in maintaining predictable DC operating conditions due to process variations and power supply variations, requiring costly and time-consuming testing to set quiescent drain current, and existing solutions like resistor-based voltage bias circuits can adversely affect power added efficiency.
Innovation Solution
An integrated circuit chip with a current mirror configuration and a bias voltage producing circuit that tracks variations in current to generate a gate voltage for transistors, compensating for material, process, and temperature variations, and power supply changes, eliminating the need for external resistors and reducing testing requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a resistor is used in the source to ground path to supply gate voltage, then the gate voltage can be adjusted, but the power added efficiency of the amplifier is adversely affected
Solution Approach 1:
The invention extracts and eliminates the resistor from the biasing circuit by using an active transistor-based current mirror circuit instead. This removes the harmful energy-dissipating component while maintaining the gate voltage control functionality through active devices that do not continuously dissipate power like resistors do.
Solution Approach 2:
The invention replaces the passive resistor-based voltage division mechanism with an active transistor-based current control mechanism. The transistor gate voltage is controlled by adjusting the drain current of the second transistor, which is coupled to the current source, rather than using a resistor to create a voltage drop.
2Manufacturing precision
If external testing and assembly tailoring is performed to set quiescent drain current, then the drain current can be precisely set, but significant time and cost are added to the product
Solution Approach 1:
The biasing circuit is designed to automatically self-adjust and self-bias the amplifier transistor without requiring external testing or manual calibration. The current mirror configuration with the second transistor and bias voltage producing circuit creates a feedback mechanism that automatically sets the correct gate voltage to achieve the desired quiescent drain current, making the circuit self-configuring.
Solution Approach 2:
The invention creates a universal biasing circuit that can be used across multiple amplifier units without requiring individual testing or customization. The circuit automatically adapts to process variations and power supply changes, providing consistent performance across production batches without needing part-by-part characterization and binning.
3Device complexity
If fixed gate voltage is used, then the circuit is simple, but the FET characteristics sensitivity to fabrication process and temperature precludes using of a fixed Vg
Solution Approach 1:
The invention transforms the static fixed gate voltage approach into a dynamic biasing system where the gate voltage automatically adjusts in response to changes in drain current, temperature, and process variations. The bias voltage producing circuit continuously monitors and adjusts the gate voltage to maintain stable operation, making the circuit adaptive rather than fixed.
Solution Approach 2:
The invention implements a feedback mechanism where the bias voltage producing circuit monitors the drain current and adjusts the gate voltage accordingly. The second transistor's drain current, which is coupled to the current source, feeds back to control the gate voltage, creating a closed-loop system that automatically compensates for variations and maintains stable DC operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution maintains quiescent current within design specifications, ensuring stable DC operation while enhancing power added efficiency by eliminating the need for external resistors and reducing testing time and costs.
Implementation Method 1
a current mirror comprising: an output transistor having a gate electrode for controlling a first current between a first electrode and a second electrode... The bias circuit includes a second transistor having a gate electrode for controlling a second current... The gate electrodes of the output and second transistors are connected together to produce the first current and the second current with equal current densities
Implementation Method 2
A first portion of current from the current source is fed to the first electrode of the second transistor through a first path and a second portion of current from the current source is fed to the bias voltage producing circuit through a second path, such second portion of the current passing through the bias voltage producing circuit producing a bias voltage at the gate electrode of the output transistor, such bias voltage tracking variations in the first current passing through the output transistor
Data Source
AI summary
A network having a current mirror comprising: a output transistor having a gate electrode for controlling a first current between a first electrode and a second electrode, the first electrode being coupled to a positive reference potential and the second electrode being connected to ground. A second transistor has a gate electrode for controlling a second current between a first electrode and a second electrode of the second transistor. The gate electrodes are connected together to produce the first current and the second current with equal current densities. A first portion of current from a current source is fed to the first electrode of the second transistor and a second portion of current from the current source is fed to a bias voltage producing circuit producing a bias voltage at the gate electrode of the output transistor for tracking variations in the first current passing through the output transistor.