Complementary Current Mirror Buffers for Linear Impedance Termination
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Solution Overview
Problem
Existing wireless circuitry in electronic devices often experiences poor linearity in current buffer circuits, leading to degradation in transmitter performance.
Innovation Solution
The implementation of differential current buffer circuits using complementary current mirror circuits, which include diode-connected n-type and p-type transistors, along with additional components like resistors and capacitors, to enhance linearity and proper impedance termination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a current buffer circuit is used to provide impedance termination for filter circuits, then proper impedance matching is achieved, but linearity deteriorates and transmitter performance degrades
Solution Approach 1:
The current buffer circuit is segmented into multiple parallel current mirror circuits (first current mirror circuit and second current mirror circuit), each handling different signal components. This segmentation allows each sub-circuit to be optimized for linearity while collectively providing the required impedance termination, resolving the contradiction between reliability and manufacturing precision.
Solution Approach 2:
Multiple current mirror circuits are merged in parallel configuration to combine their individual linearity benefits while achieving the aggregate impedance termination requirement. The combined circuit structure provides both the reliability of proper impedance matching and the manufacturing precision of high linearity through the synergistic effect of parallel operation.
2Manufacturing precision
If additional components (resistors, capacitors, envelope detectors) are added to improve linearity, then intermodulation distortion is reduced, but device complexity increases
Solution Approach 1:
Resistors and capacitors are introduced as intermediary components that mediate between the input signal and the current mirror circuits. These intermediaries linearize the input characteristics and reduce intermodulation distortion without requiring complete redesign of the core current buffer architecture, thus improving linearity with moderate complexity increase.
Solution Approach 2:
An envelope detector is implemented to provide feedback about the signal envelope to the current buffer circuit. This feedback mechanism dynamically adjusts operating parameters to maintain linearity across varying signal conditions, reducing intermodulation distortion through closed-loop control while adding only moderate complexity.
Data Source
AI summary
An electronic device may include wireless circuitry having digital-to-analog converters, filters, mixers, and current buffers disposed between the filters and the mixers. The current buffers may provide proper resistance termination for the filters. The current buffers may include current mirrors formed from diode-connected n-type transistors and diode-connected p-type transistors, which collectively provide a linear input resistance. The current mirrors may receive a high voltage from a voltage regulator having a replica current mirror and proportional-to-absolute-temperature current sources.