Current Mirror Standby Power Reduction via Switching Stage
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Solution Overview
Problem
Current mirror circuits in non-volatile memory devices, such as PCM devices, face challenges in reducing power consumption and minimizing re-activation delays during stand-by conditions due to high power consumption and mismatch errors, which existing solutions have not adequately addressed.
Innovation Solution
The proposed current mirror circuit incorporates a switching stage with control signals to disconnect the current mirror from the reference current during stand-by, maintaining a charged parasitic capacitance or connecting it to a stand-by voltage, allowing for immediate reactivation with minimal voltage variation and reduced power consumption, utilizing a band-gap voltage reference for efficient stand-by management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high polarization reference currents are used to reduce mismatch errors below 5%, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the parasitic capacitance at the control terminal of the mirror transistor before stand-by mode. This is achieved through a start-up circuit that activates temporarily to charge the capacitance, ensuring that when the current mirror is reactivated from stand-by, the capacitance is already at the required voltage level, eliminating activation delay and allowing immediate accurate current mirroring without requiring high continuous reference currents
Solution Approach 2:
The patent implements periodic action by using pulsed reference currents instead of continuous high currents. The reference current is activated only during brief periods when memory operations are needed, while during stand-by periods the current mirror is disconnected or placed in low-power mode. This periodic activation pattern reduces average power consumption while maintaining measurement precision when actually needed
2Use of energy by moving object
If the current mirror is disconnected during stand-by to reduce power consumption, then power consumption is reduced, but re-activation delay increases
Solution Approach 1:
The patent applies preliminary action by maintaining the parasitic capacitance at the control terminal in a charged state even during stand-by mode. The start-up circuit charges this capacitance in advance, and a holding circuit maintains the charge during stand-by. When reactivation is needed, the capacitance is already prepared at the correct voltage, allowing immediate current mirroring operation without activation delay, thus resolving the contradiction between power reduction and fast reactivation
3Speed
If continuous reference current is supplied to ensure immediate reactivation, then speed is improved, but power consumption increases
Solution Approach 1:
The patent applies self-service by using the parasitic capacitance inherent in the mirror transistor's control terminal to store the necessary charge for immediate reactivation. Instead of requiring continuous external reference current supply, the system uses its own internal capacitance to maintain readiness state. The start-up circuit charges this internal capacitance, and it automatically maintains the voltage level needed for instant current mirroring operation, eliminating the need for continuous power supply while ensuring fast reactivation
Data Source
AI summary
A current mirror circuit is provided with a first current mirror including first and second mirror transistors sharing a common control terminal; the first mirror transistor has a conduction terminal for receiving, during a first operating condition, a first reference current, and the second mirror transistor has a respective conduction terminal for providing, during the first operating condition, a mirrored current based on the first reference current. The current mirror circuit is provided with a switching stage operable to connect the control terminal to the conduction terminal of the first mirror transistor during the first operating condition, and to disconnect the control terminal from the same conduction terminal of the first mirror transistor, and either letting it substantially float or connecting it to a reference voltage, during a second operating condition, in particular a condition of stand-by.