Current Mirror Voltage Detector for Stable Memory Bias

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Solution Overview

Problem

Conventional back bias voltage detection circuits in semiconductor memory devices experience significant variations in detection signal levels due to changes in process conditions, leading to unstable internal voltage levels.

Innovation Solution

An internal voltage generation circuit utilizing a current mirror type detector that generates a comparison voltage based on internal voltage changes, comparing it with a reference voltage to output a detection signal, which is used by a charge pump to control the internal voltage level, maintaining it within a predetermined range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional back bias voltage detection circuit using PMOS transistors and inverter is used, then the detection circuit can monitor internal voltage changes, but the detection signal level varies widely due to process condition changes

Engineering Contradiction:
Improvedetection signal stabilityVSAvoiddetection point accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent changes the detection mechanism from voltage-based (conventional) to current-based. The current mirror circuit uses current as the detection parameter instead of voltage, which is less sensitive to process variations. The variable current source adjusts the current level dynamically, and the current mirror reflects this current to generate a stable comparison voltage that is less affected by process conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a current mirror as an intermediary between the variable current source and the comparison voltage generation. The current mirror acts as a buffer that transfers current information while isolating the detection circuit from direct voltage variations caused by process changes, thereby stabilizing the detection signal.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the level of back bias voltage becomes lower than ground voltage, then the resistance of PMOS transistor P2 decreases, but this causes severe voltage level variations at node ND1

Engineering Contradiction:
Improvevoltage level controlVSAvoidvoltage level stability
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The patent replaces the voltage-based detection mechanism with a current-based mechanism. Instead of monitoring voltage levels directly (which causes stability issues when VBB < VSS), the system uses current mirrors to detect and respond to voltage changes through current relationships, which remain stable even when voltage levels shift.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The current mirror circuit maintains equivalent current relationships between corresponding transistors, creating an equipotential effect in the current domain. This ensures that the comparison voltage remains stable relative to process variations, as the current ratios are maintained regardless of absolute voltage level shifts.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS7834680B2Internal voltage generation circuit for generating stable internal voltages withstanding varying external conditions
Publication Date: 2010.11.16 MIMIRIP LLC
  • US7834680B2 patent drawing
  • US7834680B2 patent drawing
  • US7834680B2 patent drawing

AI summary

There is provided an internal voltage generation circuit generating an internal voltage used for a semiconductor memory device. The internal voltage generation circuit includes a current mirror type internal voltage detector generating a comparison voltage and comparing the comparison voltage with a reference voltage to output the comparison result as a detection signal, and a charge pump outputting the internal voltage and controlling the level of the internal voltage by the detection signal. The current mirror type internal voltage detector generates a comparison voltage whose level is determined in accordance with the output of the current mirror having a variable current source in which current varies in accordance the output internal voltage.