Current-Mode Switch Calibration for DAC Delay Matching

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Solution Overview

Problem

Current-mode circuits in high-speed digital-to-analogue converters (DACs) and analogue-to-digital converters (ADCs) face challenges due to mismatch in switching delays of field-effect transistors, particularly when transistors are made small to reduce switching delays, leading to performance issues at higher speeds.

Innovation Solution

A current-mode circuit with switch units featuring a field-effect transistor connected in series with a variable impedance, calibrated by an adjustment circuit to adjust the impedance to compensate for transistor mismatches, using a comparator to align measurement voltage with a reference voltage, and potentially incorporating digital-to-analogue converters to fine-tune resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If transistors are made small to reduce switching delays, then switching speed is improved, but mismatch in switching delays increases

Engineering Contradiction:
Improveswitching speedVSAvoidswitching delay match
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent adjusts the impedance parameter of each switch unit to compensate for transistor mismatches. By changing the impedance values, the overall switching delay of each channel is tuned to achieve matched delays across all channels, thereby resolving the contradiction between fast switching and delay matching.

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If transistors are made small to reduce switching delays, then switching delay is reduced, but performance at higher speeds deteriorates

Engineering Contradiction:
Improveswitching delayVSAvoidperformance consistency
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent modifies the impedance parameter of switch units to compensate for performance variations at high speeds. By adjusting impedance, the switching characteristics are optimized to maintain consistent performance across different operating conditions and channels.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If impedance is made variable for calibration, then transistor mismatch compensation is improved, but device complexity increases

Engineering Contradiction:
Improveswitching delay calibrationVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces variable impedance elements that can be adjusted during calibration to match switching delays across channels. This parameter adjustment capability enables precise compensation for transistor mismatches while keeping the additional circuitry relatively simple.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4125219B1Current-mode circuits and calibration thereof
Publication Date: 2026.04.01 SOCIONEXT INC
  • EP4125219B1 patent drawingFigure 1~2
  • EP4125219B1 patent drawingFigure 3A~3B
  • EP4125219B1 patent drawingFigure 4

AI summary

A current-mode circuit, comprising: at least one switch unit, each switch unit comprising a field-effect transistor connected at its source terminal in series with an impedance and configured to carry a given current, wherein for each switch unit or for at least one of the switch units the impedance is a variable impedance; and an adjustment circuit configured, for each switch unit or for said at least one of the switch units, to adjust an impedance of the variable impedance to calibrate a predetermined property of the switch unit which is dependent on the field-effect transistor.