Current-Mode Channel Transmission With Feedback Against ISI
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Solution Overview
Problem
Conventional data transmission systems experience intersymbol interference (ISI) due to parasitic components, which affect the accuracy of signal transmission, especially when transmitting series of the same values, leading to waveform changes and reduced transmission accuracy.
Innovation Solution
Incorporating current limiting circuitry in the transmitter and negative feedback circuitry in the receiver, including a pre-driver, transistors, and a resistance to manage voltage levels and reduce ISI, thereby maintaining a symmetric waveform and minimizing charge accumulation on parasitic capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CMOS-to-CMOS interface is used for data transmission, then the system is simple and easy to manufacture, but intersymbol interference occurs due to parasitic components, reducing transmission accuracy
Solution Approach 1:
The patent introduces negative feedback circuitry in the receiver that monitors the received signal and adjusts the decision threshold dynamically. This feedback mechanism compensates for intersymbol interference by adapting to channel conditions, thereby improving transmission accuracy without requiring complete redesign of the transmission system.
Solution Approach 2:
The patent modifies the voltage swing parameters in the transmitter to optimize signal integrity. By adjusting the voltage levels and swing characteristics, the system reduces the impact of parasitic components while maintaining compatibility with standard CMOS interfaces, thus improving reliability without excessive complexity increase.
2Measurement precision
If full voltage swing between VDD and GND is used in receiver transistors, then the transistors are fully on or off for clear logic levels, but charge accumulates on parasitic capacitors causing waveform distortion
Solution Approach 1:
The patent implements periodic resetting of the parasitic capacitors through the negative feedback circuitry. By periodically discharging or resetting these capacitors, the system prevents charge accumulation that would otherwise distort the waveform, while still maintaining clear logic level detection during the active transmission periods.
Solution Approach 2:
The patent introduces asymmetric voltage levels in the differential signaling scheme. By using unequal voltage swings for logic high and logic low, the system optimizes the operating points of the transistors to remain in saturation region, improving detection accuracy while reducing charge accumulation effects through the asymmetric charge-discharge cycles of the parasitic capacitors.
Data Source
AI summary
Apparatus and methods related to data transmission are disclosed. One such apparatus includes a transmitter, a receiver, and a channel. The transmitter includes a pair of current sources and a pair of switches. Each of the switches conducts one of the current sources to the channel in response to input data. The receiver includes a first node configured to receive a signal over the channel. The receiver also includes a resistance generating a voltage drop between the first node and a second node. The receiver further includes a first transistor and a second transistor that are together configured to provide a voltage level to the second node based at least partly on the voltage drop. The resistance provides a negative feedback to center the mean signal level, thereby reducing intersymbol interference.