Current-Mode Analog Multipliers for Low-Power AI MAC Circuits
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Solution Overview
Problem
Current analog current-mode multipliers and multiply-accumulate circuits in integrated circuits face challenges in achieving small size, low cost, low current consumption, asynchronous operation, reduced memory usage, and compatibility with low power supply voltages, while maintaining accuracy and reliability in machine learning and artificial intelligence applications.
Innovation Solution
The development of analog current-mode multipliers and multiply-accumulate circuits utilizing substrate parasitic Bipolar Junction Transistors (BJTs) in CMOS fabrication, which operate in the subthreshold region, eliminating the need for resistors and capacitors, and employing current-mode digital-to-analog converters to achieve scalable, symmetric, and low-power consumption designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional digital computing is used for AI & ML signal processing, then computational accuracy is maintained, but power consumption increases due to memory read-and-write cycles and clock noise
Solution Approach 1:
The patent extracts the memory component from the computational process by performing multiply-accumulate operations directly in the analog domain. Current signals representing data and weights are multiplied and accumulated without being stored in digital memory, eliminating memory read-and-write cycles that consume power. The current-mode iMAC circuit computes results directly from input currents, removing the need for intermediate digital storage.
Solution Approach 2:
The patent replaces the digital computing mechanism (which relies on clocked sequential operations and memory access) with an analog current-mode computing mechanism. The mechanical/electrical system uses continuous current signals and transistor-based multiplication to perform computations, substituting the discrete digital logic system. This analog approach eliminates clock noise and reduces power consumption associated with digital switching operations.
2Measurement precision
If analog multipliers are designed with high precision components, then computational accuracy improves, but device size and manufacturing cost increase
Solution Approach 1:
The patent employs standard CMOS transistors operating in the subthreshold region rather than precision bipolar transistors or specialized analog components. These conventional transistors are inexpensive and require minimal area. The patent accepts the inherent variability of standard devices and compensates through circuit topology design and statistical methods, rather than requiring high-precision components. This approach uses readily available, low-cost components to achieve acceptable accuracy for AI applications.
Solution Approach 2:
The patent changes the operating parameters of standard CMOS transistors to the subthreshold region, where they exhibit exponential current-voltage characteristics suitable for analog computation. By operating at these extreme parameters rather than in the standard saturation region, the patent achieves analog functionality using standard digital CMOS processes, avoiding the need for precision analog components. This parameter change enables accurate computation with small, inexpensive transistors.
3Object-affected harmful factors
If high current levels are used in analog multipliers, then signal-to-noise ratio improves, but power consumption increases
Solution Approach 1:
The patent employs periodic switching of current sources to achieve signal integration over time, effectively increasing the signal-to-noise ratio through temporal averaging. The current-mode iMAC circuit uses switched-current architectures where signals are integrated over multiple switching periods, allowing low-current operation while maintaining acceptable SNR through time-averaging effects. This periodic action enables low-power operation without sacrificing measurement quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These circuits achieve efficient, low-power, and compact designs that support high-speed operations with minimal voltage swings, reducing power consumption and noise, while maintaining accuracy and reliability for AI & ML applications, and effectively handling random errors through error attenuation at summing nodes.
Implementation Method 1
employing current-mode digital-to-analog converters to achieve scalable, symmetric, and low-power consumption designs
Data Source
AI summary
Analog multipliers can perform signal processing with approximate precision asynchronously (clock free) and with low power consumptions, which can be advantageous including in emerging mobile and portable artificial intelligence (AI) and machine learning (ML) applications near or at the edge and or near sensors. Based on low cost, mainstream, and purely digital Complementary-Metal-Oxide-Semiconductor (CMOS) manufacturing process, the present invention discloses embodiments of current-mode analog multipliers that can be utilized in multiply-accumulate (MAC) signal processing in end-application that require low cost, low power consumption, (clock free) and asynchronous operations.