Current-Mode Output Driver for Multi-Standard DDR Voltage Matching
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Solution Overview
Problem
The increasing complexity of memory standards, such as DDR, DDR II, and DDR III, requires different voltage levels and larger transistor and I/O pad areas, leading to increased design inconvenience and costs due to the need for supporting multiple standards and providing various voltages.
Innovation Solution
An output driving circuit utilizing a current mode driving circuit with an adjustable current source and control circuit to generate suitable output voltages and slew rates, allowing it to meet multiple technical specifications without requiring different voltages or voltage reducing elements, thereby reducing layout area and design complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different voltage levels are provided for different memory standards, then multiple memory standards can be supported, but device complexity and cost increase
Solution Approach 1:
The patent changes the voltage parameter dynamically by selecting different resistors (R1-R4) in the voltage division circuit based on the memory standard being used. This allows the output voltage to be adjusted between different levels (e.g., 2.5V for DDR1, 1.8V for DDR2, 1.5V for DDR3) using a single circuit architecture, thereby supporting multiple standards without increasing device complexity.
Solution Approach 2:
The patent designs a universal output driving circuit that can serve multiple memory standards (DDR1, DDR2, DDR3) through a single configuration. By incorporating selectable resistors and a unified voltage generation approach, the circuit performs multiple voltage output functions without requiring separate dedicated circuits for each standard, thus reducing overall complexity.
2Adaptability or versatility
If transistor width and I/O pad area are increased to meet different standards, then multiple standards can be supported, but layout area increases
Solution Approach 1:
The patent uses parameter changes in the resistor values (R1-R4) to adapt the voltage output for different memory standards instead of changing physical dimensions like transistor width or I/O pad area. This allows the same layout to support multiple standards, thereby avoiding layout area expansion.
3Adaptability or versatility
If different voltages are provided for different memory standards, then multiple standards can be supported, but cost increases
Solution Approach 1:
The patent implements a universal voltage generation circuit that can produce different voltage levels for different memory standards using a single design. This eliminates the need for multiple separate voltage generation circuits, reducing component count and manufacturing complexity, thereby lowering production costs while maintaining support for multiple standards.
Solution Approach 2:
The patent merges the voltage generation functionality for multiple memory standards into a single integrated circuit block. By combining the voltage division network with selectable resistors and a unified output stage, the design reduces the total number of components and simplifies the manufacturing process, thus reducing cost.
4Adaptability or versatility
If multiple voltage reducing elements are provided for different standards, then multiple standards can be supported, but device complexity increases
Solution Approach 1:
The patent merges multiple voltage reducing functions into a single voltage division circuit with selectable resistors. Instead of having separate voltage reducing elements for each memory standard, the design combines them into one unified circuit that can be configured for different voltage levels, thereby reducing device complexity.
Data Source
AI summary
Disclosed is an output driver, which comprises: a resistance element with resistance, coupled to an output terminal; a current mode driving circuit, coupled to the resistance element, for providing a first current to the output terminal, wherein at least one of the amount of the first current and the resistance of the resistance element is adjusted according to a control signal; and a control circuit for generating the control signal according to a mode signal, wherein the mode signal corresponds to at least two technology standards.