Current-Mode Switched Regulator Transient Response

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Solution Overview

Problem

Current-mode control switching regulators exhibit slow transient response and limited system bandwidth due to clock latency and sampling effects, as they typically only sample current once per clock cycle.

Innovation Solution

A voltage regulator design that uses both peak and valley threshold levels of current to control the duty cycle of the switch, with current sensors and pulse-width modulators configured to switch the output based on these thresholds, allowing for continuous sensing and improved sampling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If current-mode control is used to regulate voltage, then control precision is improved, but transient response becomes slow due to clock latency

Engineering Contradiction:
Improvecontrol precisionVSAvoidtransient response
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies preliminary action by continuously sensing the current through the switch throughout the entire clock cycle, rather than waiting for a specific sampling point. This continuous sensing allows the control system to prepare and respond to transient conditions immediately, eliminating the clock latency that plagues traditional current-mode control while maintaining precise control throughout the cycle.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements continuity of useful action through continuous current sensing during the entire switching cycle. By maintaining uninterrupted current measurement and control rather than periodic sampling, the system achieves both high precision control and fast transient response, as the control action is continuously available to respond to any changes in load or input conditions.

Inventive Principle:
Principle #20Continuity of useful action

2Device complexity

If current is sampled once per clock cycle, then device complexity is reduced, but system bandwidth is limited due to sampling effect

Engineering Contradiction:
Improvesampling complexityVSAvoidsystem bandwidth
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent eliminates the sampling effect by implementing continuous current sensing throughout the clock cycle rather than periodic sampling. This continuous measurement approach increases the effective bandwidth and reliability of the control system without significantly increasing complexity, as it utilizes the existing current sense amplifier continuously rather than adding complex sampling infrastructure.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

By continuously monitoring the current waveform throughout the entire clock cycle, the system maintains preliminary awareness of current conditions at all times. This eliminates the bandwidth limitations imposed by periodic sampling, allowing the control system to respond to high-frequency transients and maintain stability across a wider frequency range.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7812585B2Advanced current-mode control for switched regulators
Publication Date: 2010.10.12 ANALOG DEVICES INT UNLTD CO
  • US7812585B2 patent drawing
  • US7812585B2 patent drawing
  • US7812585B2 patent drawing

AI summary

A voltage regulator includes an input connectable to a voltage source and an output connectable to a load. The voltage regulator includes an inductor coupled to the output, a switch between the input and the inductor, and a current control loop configured to control the duty cycle of the switch to regulate voltage at the output, wherein the duty cycle being based on both a peak and valley threshold level of current flowing through the inductor.