Current-Controlled Oscillator With Single-Comparator 50% Duty Cycle
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Solution Overview
Problem
Traditional current-controlled oscillators require multiple current sources and comparators, leading to high power consumption and area occupancy, and struggle to maintain a 50% duty cycle due to mismatch issues, which is inefficient for modern integrated circuit designs.
Innovation Solution
A current-controlled oscillator design utilizing a single comparator and a single current source in the frequency generation path, with identical capacitors to ensure a 50% duty cycle, reducing power consumption and area while eliminating comparator and current source mismatch issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional architecture with two current sources and two comparators is used, then frequency generation function is achieved, but power consumption and area occupancy increase
Solution Approach 1:
The patent merges the functions of two current sources into a single current source by using a current mirror configuration where one current source drives two current mirrors. Similarly, the two comparator functions are merged into a single comparator that sequentially compares voltages during different half-cycles. This consolidation directly reduces the number of components while maintaining the frequency generation function.
Solution Approach 2:
The single comparator in the patent performs multiple functions: it compares voltages during both half-cycles, generates both clock signals CLK1 and CLK2, and works with the current mirrors to achieve the oscillation function that traditionally required two separate current sources and two comparators. This multi-functionality reduces component count and power consumption.
2Area of stationary object
If traditional architecture with two comparators is used, then frequency generation is achieved, but area occupancy increases
Solution Approach 1:
The patent combines the functions of two comparators into a single comparator by using sequential operation during different half-cycles. The single comparator alternates between comparing voltages in the first half-cycle and voltages in the second half-cycle, thereby achieving the functionality of two comparators with one component, significantly reducing area occupancy.
Solution Approach 2:
The patent employs periodic action by using the single comparator in alternating half-cycles. During the first half-cycle, the comparator performs one comparison function, and during the second half-cycle, it performs the other comparison function. This periodic utilization allows one comparator to replace two, reducing the overall circuit area.
3Power
If two current sources are used in traditional architecture, then frequency generation is achieved, but power consumption increases
Solution Approach 1:
The patent merges two current sources into one by using a current mirror configuration. A single current source feeds two current mirrors that replicate the current in different branches of the circuit. This approach maintains the necessary current driving capability for frequency generation while using only one physical current source, thereby reducing power consumption.
Solution Approach 2:
The patent uses current mirrors to create copies of the current from a single current source. The current mirror circuits replicate the reference current into multiple branches without requiring additional independent current sources. This copying mechanism allows the circuit to function with multiple current paths while consuming power equivalent to a single current source.
4Power
If two comparators are used in traditional architecture, then frequency generation is achieved, but power consumption increases
Solution Approach 1:
The patent merges the functionality of two comparators into a single comparator by implementing sequential comparison operations during different half-cycles. The single comparator alternates between comparing voltages in the first half-cycle and voltages in the second half-cycle, achieving the dual comparator function with half the power consumption of two separate comparators.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves significantly reduced power consumption and area usage while maintaining a stable 50% duty cycle, with power savings of up to 40% compared to traditional oscillators, and is suitable for low-power applications.
Implementation Method 1
capacitor 111, capacitor 112
Implementation Method 2
In a half cycle, capacitor 111 is charged and capacitor 112 is grounded. In a next half cycle, capacitor 112 is charged and capacitor 111 is grounded.
Implementation Method 3
Whenever a voltage at either of the non-inverted input terminal of comparator 101 and the non-inverted input terminal of comparator 102 reaches V REF, the voltage toggles the latch 130.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.