Current-Mode Read-Out Circuit for Low-Noise pA Digitization

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Solution Overview

Problem

Existing read-out circuits struggle to accurately measure and digitize very small electrical currents in the pA range without significantly increasing area or current consumption, and they often require complex designs like correlated double sampling (CDS) circuits that degrade signal quality.

Innovation Solution

A read-out circuit utilizing a capacitive current amplifier and a continuous-time incremental sigma-delta modulator in current mode, where the modulator reset is performed after the current amplifier reset with a controlled delay, eliminating background noise by separating the reset processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If correlated double sampling (CDS) circuits are used to reduce noise, then noise reduction is achieved, but device complexity and signal quality degradation occur

Engineering Contradiction:
ImprovenoiseVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the CDS circuit from the read-out architecture, replacing it with a simplified direct digitization approach using a sigma-delta modulator that inherently handles noise reduction without requiring separate CDS blocks, thereby reducing overall device complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/electrical CDS sampling mechanism with a digital signal processing approach using oversampling and noise shaping in the sigma-delta modulator, substituting analog sampling operations with digital filtering and processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Object-affected harmful factors

If CDS circuits are used for noise reduction, then noise is reduced, but signal quality degrades

Engineering Contradiction:
ImprovenoiseVSAvoidsignal quality
Core Design Contradiction:
Object-affected harmful factorsVSMeasurement precision

Solution Approach 1:

The patent replaces the analog CDS subtraction mechanism with digital signal processing that uses oversampling and noise shaping to push quantization noise out of the signal band, where it can be filtered without affecting signal quality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs periodic oversampling at a high rate much greater than the signal bandwidth, using periodic noise shaping to modulate quantization noise to higher frequencies where it does not interfere with the measurement signal

Inventive Principle:
Principle #19Periodic action

3Productivity

If direct digitization of very small currents is implemented, then measurement speed and simplicity are improved, but noise reduction capability is insufficient

Engineering Contradiction:
Improvemeasurement speedVSAvoidnoise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent implements continuous periodic oversampling at a high frequency much greater than the signal bandwidth, converting the small current signals into a high-rate digital stream that can be processed with digital filtering to achieve both speed and noise reduction

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent employs feedback in the sigma-delta modulator that shapes the quantization noise spectrum, pushing noise power to higher frequencies where it can be filtered out, while maintaining high measurement speed through continuous oversampling

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables direct digitization of very small electrical currents in the pA range with reduced noise, eliminating the need for CDS circuits and minimizing noise contribution from charge noise, while maintaining high resolution for both small and large currents.

Implementation Method 1

a capacitive current amplifier and a continuous-time incremental sigma-delta modulator in the current mode

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

continuous-time incremental sigma-delta modulator in the current mode, wherein the continuous-time incremental sigma-delta modulator is configured to carry out a modulator reset

Methodology Applied
Scientific EffectSigma-delta modulation:

Data Source

PatentUS20250385687A1Read-out circuit for reading out electrical currents of 10 na and/or less and use of a read-out circuit and method for reading out the read-out circuit
Publication Date: 2025.12.18 HAHN SCHICKARD GESELLSCHAFT FUR ANGEWANDTE FORSCHUNG EV
  • US20250385687A1 patent drawing
  • US20250385687A1 patent drawing
  • US20250385687A1 patent drawing

AI summary

A read-out circuit for reading out electrical currents of 10 nA or less is described, wherein the read-out circuit arrangement has a capacitive current amplifier and a continuous-time incremental sigma-delta modulator in the current mode. In addition, a use of the read-out circuit and a method for reading out the read-out circuit are described.