Current Sense Terminal ESD Path via Power Transistor Connection
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Solution Overview
Problem
Integrated current sensors in power transistor chips, such as IGBTs, face challenges in achieving sufficient ESD ruggedness due to their small size, which results in lower charge storage capacity and potential weakness in ESD protection.
Innovation Solution
The implementation of a resistive and/or diodic connection between the sense terminal of the current sense device and the load terminal of the power transistor provides an ESD discharge path, enhancing the ESD ruggedness of the current sense device by redirecting high-frequency oscillations to the more robust power transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the current sense device is made small to reduce area, then area is reduced, but ESD ruggedness deteriorates
Solution Approach 1:
The patent introduces a resistive connection (200) as an intermediary element between the current sense device (150) and the power transistor (100). This resistor provides a controlled discharge path for ESD events, allowing the small current sense device to benefit from the ESD protection mechanism without requiring increased area. The intermediary resistor enables charge to be safely dissipated to the power transistor's load terminal, resolving the contradiction between small area and ESD ruggedness.
2Reliability
If the current sense device area is increased to improve ESD ruggedness, then ESD ruggedness is improved, but area increases
Solution Approach 1:
Instead of increasing the current sense device area, the patent uses a resistive connection as an external ESD protection mechanism. The resistor (200) with specific resistance value (e.g., 1 kOhm) provides a controlled path for ESD charge to discharge to the power transistor's load terminal, achieving ESD ruggedness improvement without requiring additional area in the current sense device itself.
Solution Approach 2:
The power transistor's load terminal serves a dual function: its normal operational role and as an ESD charge sink. By designing the resistive connection to discharge ESD charge to the load terminal, the system utilizes the power transistor's existing charge storage capacity and structural robustness to protect the current sense device, eliminating the need for separate ESD protection structures.
3Reliability
If a resistive connection is added for ESD protection, then ESD ruggedness is improved, but device complexity increases
Solution Approach 1:
The resistive connection (200) is designed to serve multiple functions: it provides ESD protection by offering a discharge path during ESD events, and it maintains minimal impact on normal operational current sensing. The same resistive element that protects against ESD does not interfere with the current sense device's primary function, achieving multi-functionality without significantly increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively boosts the ESD ruggedness of the current sense device, preventing ESD failure and gate oxide breakdown by leveraging the greater charge storage capacity of the power transistor.
Implementation Method 1
a resistive and/or diodic connection between the sense terminal of the current sense device and the first load terminal of the power transistor, wherein the resistive and/or diodic connection is designed solely for ESD (electrostatic discharge) protection of the current sense device, by providing an ESD discharge path to the first load terminal of the power transistor
Data Source
AI summary
A semiconductor die includes: a semiconductor substrate; a power transistor formed in the semiconductor substrate; a current sense device formed in the semiconductor substrate and occupying less area of the semiconductor substrate than the power transistor; a first contact pad electrically connected to a first load terminal of the power transistor; a second contact pad electrically connected to a sense terminal of the current sense device, the second contact pad being dedicated to current sensing only; and a resistive and/or diodic connection between the sense terminal of the current sense device and the first load terminal of the power transistor. The resistive and/or diodic connection is designed solely for ESD (electrostatic discharge) protection of the current sense device, by providing an ESD discharge path to the first load terminal of the power transistor.


