Current Sense Resistor Built-In-Test Circuit for SSPC
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Solution Overview
Problem
Current sense resistors in solid-state power controllers face challenges in testing due to low resistance values and susceptibility to load noise, making it difficult to determine their proper functioning.
Innovation Solution
A built-in-test circuit is implemented using a leakage load resistor and switch in series with the current sense resistor, coupled with a processing unit that generates a pseudo-random sequence to differentiate between leakage and load currents, allowing for real-time testing and accurate measurement of the current sense resistor value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional testing methods are used for current sense resistors, then the testing process is simple, but the measurement precision is poor due to low resistance values and load noise
Solution Approach 1:
The patent segments the current measurement into two distinct components: load current (measured when switch 220 is open) and leakage current (measured when switch 220 is closed). By separating these measurements temporally and computationally, the system can isolate the small leakage current signal from the dominant load current, thereby improving measurement precision for the current sense resistor testing.
Solution Approach 2:
The patent introduces a pseudo-random sequence generator and accumulator as intermediary components between the current sense resistor and the processing unit. The pseudo-random sequence modulates the leakage current measurement, and the accumulator integrates these modulated signals over time, effectively amplifying the small leakage current signal above the noise floor and enabling precise measurement despite the low resistance values.
2Reliability
If conventional testing methods are used, then the circuit remains simple, but reliability is poor due to false fault detection from load noise
Solution Approach 1:
The patent employs periodic switching of switch 220 according to a pseudo-random sequence, creating periodic measurement cycles. By repeatedly measuring the leakage current multiple times (e.g., 256 cycles) and accumulating the results, the system averages out random noise and load variations, significantly improving fault detection reliability and reducing false positives.
Solution Approach 2:
The patent implements a feedback mechanism where the processed leakage current measurement is compared against predetermined thresholds to determine fault conditions. The system continuously monitors the accumulated leakage current signal and provides feedback control by triggering fault indications only when the measured value exceeds the threshold, thereby improving reliability by filtering out noise-induced false alarms.
3Difficulty of detecting and measuring
If a built-in-test circuit is implemented, then test sensitivity improves, but the device complexity increases
Solution Approach 1:
The patent designs the built-in-test circuit to serve multiple functions: it can measure both load current and leakage current, perform self-diagnostics of the current sense resistor, and provide fault detection capabilities. The same current sense resistor and basic circuit topology are reused for different measurement purposes, reducing the need for entirely separate testing hardware and mitigating the complexity increase.
Solution Approach 2:
The patent implements self-service by enabling the current sense resistor and associated circuitry to test themselves without requiring external testing equipment. The built-in-test circuit uses the existing components (current sense resistor, switch, processing unit) to perform self-diagnostics, eliminating the need for separate external test devices and reducing overall system complexity despite adding measurement capabilities.
Data Source
Figure 1A
Figure 1B
Figure 2~6
AI summary
A solid-state power controller (SSPC) system with a built-in-test circuit includes a SSPC field-effect transistor (FET) switch (104). The system includes a current sense resistor (106) electrically connected to the SSPC FET switch in series. A resistor (108) is electrically connected to the current sense resistor in series. A switch (110) is electrically connected to the resistor in series. A method for testing a current sense resistor value in a solid-state power controller (SSPC) system includes determining a cycle count, generating a new bit with a processing unit, and outputting the new bit to a switch operatively connected to the processing unit to at least one of turn the switch on or turn the switch off. The method includes reading a load current with the processing unit to determine whether a current sense resistor electrically coupled to the switch is operating within a desired resistance range.