Current-Sensed Parallel FET Circuit for Lower Switching Loss

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Solution Overview

Problem

Power conversion systems using field-effect transistors experience significant power losses due to high gate capacitances and frequent switchings, which is particularly problematic in electric vehicles with limited power sources.

Innovation Solution

A circuit configuration that includes a first field-effect transistor in series with a second transistor in parallel, along with current sensors to control the gate of the second transistor, allowing for efficient current distribution and reduced gate capacitance charging/discharging, thereby minimizing power losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If field-effect transistors with significant dimensions are used to withstand high-intensity currents, then the transistor can handle higher currents, but the gate surface area and gate capacitance increase, leading to higher power losses

Engineering Contradiction:

Improvecurrent handling capabilityVSAvoidpower loss due to gate capacitance charging

Core Design Contradiction:

PowerVSLoss of energy

Solution Approach 1:

The invention divides the single large transistor into multiple smaller transistors connected in parallel. Each smaller transistor has a reduced gate surface area and lower gate capacitance, but collectively they handle the same high current. This segmentation allows the system to maintain current handling capability while reducing the total gate capacitance charging losses.

Inventive Principle:

Principle #1Segmentation

2Productivity

If frequent switchings occur to achieve high-frequency power conversion, then the system operates at high frequency, but power losses increase due to repeated charging and discharging of gate capacitors

Engineering Contradiction:

Improvepower conversion frequencyVSAvoidpower loss from gate capacitor cycling

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

By segmenting the transistor into multiple parallel units, the gate capacitance of each unit is smaller. When switchings occur at high frequency, the total energy loss is reduced because each smaller capacitor is charged and discharged with less energy, allowing high-frequency operation with lower cumulative power losses.

Inventive Principle:

Principle #1Segmentation

3Device complexity

If a single large transistor is used, then the device complexity is low, but the gate capacitance is high causing significant power losses

Engineering Contradiction:

Improvetransistor configuration simplicityVSAvoidpower loss due to high gate capacitance

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

The invention uses multiple smaller transistors in parallel instead of a single large transistor. While this increases the number of components, each transistor is simpler in design with smaller gate capacitance. The overall system complexity increases slightly, but the energy loss reduction is significant, making the trade-off worthwhile for high-frequency power conversion applications.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS11838016B2Transistor association

Publication Date: 2023.12.05 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

AI summary

A circuit, intended to be associated in series with a load to be powered including a first field-effect transistor; at least one second field-effect transistor, associated in parallel with the first transistor; and at least one sensor of information representative of a current transmitted to said load, the gate of the second transistor being coupled to an output of the sensor.