Current Sensing Circuit CMRR Enhancement via Cascaded Transconductance Amplifiers
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Solution Overview
Problem
Current sensing circuits for PWM applications face limitations in common mode rejection ratio (CMRR), which affects performance at high frequencies and introduces signal interference, especially when input common mode voltage varies significantly.
Innovation Solution
The proposed current sensing circuit incorporates a third transconductance amplifier in cascade to the first transconductance amplifier, along with an operational amplifier and a second transconductance amplifier, to balance differential voltage and maintain output voltage stability across varying input voltages, ensuring improved CMRR and reduced signal interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If standard differential amplifiers and Gm/Gm structures are used in current sensing circuits, then the circuit can operate in PWM mode with high frequency, but the common mode rejection ratio (CMRR) deteriorates when input common mode voltage varies significantly
Solution Approach 1:
The current sensing circuit is divided into multiple functional blocks: a first transconductance amplifier for initial signal conversion, a second transconductance amplifier for differential voltage balancing, and an operational amplifier for output generation. This segmentation allows each block to optimize specific functions, with the second transconductance amplifier specifically dedicated to maintaining CMRR by balancing differential voltages at internal nodes.
Solution Approach 2:
The second transconductance amplifier acts as an intermediary element between the first transconductance amplifier and the operational amplifier. It specifically compensates for differential voltage imbalances caused by PWM switching, thereby maintaining common mode rejection without requiring trimming of the operational amplifier.
2Adaptability or versatility
If the input common mode voltage increases to match the supply voltage, then the dynamic range of the current sensing circuit is improved, but resistance mismatch occurs causing output voltage to drift from reference voltage
Solution Approach 1:
The second transconductance amplifier implements a feedback mechanism that continuously monitors and balances the differential voltages at the internal circuit nodes. This feedback action compensates for resistance mismatch effects that occur when input common mode voltage varies, ensuring the output voltage remains accurate relative to the reference voltage.
Solution Approach 2:
The circuit dynamically adjusts the operating parameters of the transconductance amplifiers to maintain performance across different input common mode voltage levels. By changing the biasing and operating points of the amplifiers, the circuit adapts to various voltage conditions while maintaining both dynamic range and output accuracy.
3Loss of energy
If PWM mode is used to reduce power consumption in voice coil motors, then energy efficiency is improved, but signal interference and phase margin reduction occur at high frequencies
Solution Approach 1:
The second transconductance amplifier serves as an intermediary that isolates the operational amplifier from PWM-induced signal interference. By balancing the differential voltages at the internal nodes before they reach the operational amplifier, it prevents switching noise and signal interference from propagating through the circuit.
Solution Approach 2:
The harmful PWM switching signals and their associated interference are extracted and neutralized by the second transconductance amplifier before they can affect the main signal path. This allows the operational amplifier to process only the clean differential signal representing the actual current measurement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly enhances CMRR, maintaining output voltage stability and reducing signal interference, even at high frequencies and varying input voltages, thereby improving the overall performance of current sensing circuits in PWM applications.
Implementation Method 1
an input block (110) having a first transconductance amplifier (Gm1) powered by a supply voltage (Vcc) and interposed between the first and the second input terminals (IN1, IN2) and first and second internal circuit nodes (N1, N2)
Implementation Method 2
an amplifier block (120) having an operational amplifier (OP) supplied by the supply voltage (Vcc) and connected to the ground terminal (Gnd) and to the first and second internal circuit nodes (N1, N2) and to the output terminal (Out) of the sensing circuit (100)
Implementation Method 3
a feedback block (130) having a second transconductance amplifier (Gm2) powered by the supply voltage (Vcc) and coupled to the output terminal (Out) and to the first and second internal circuit nodes (N1, N2)
Data Source
AI summary
A current sensing circuit for a pulse width modulation (PWM) application may include first and second input terminals to be coupled to ends of a sensing resistance, an output terminal, and first and second internal circuit nodes. The current sensing circuit further may include an input block comprising a first transconductance amplifier to be coupled to a supply voltage. The first transconductance amplifier may be coupled to the first and second input terminals and to the first and second internal circuit nodes. The current sensing circuit may also include an amplifier block comprising an amplifier to be coupled to a reference voltage, and coupled to the first and second internal circuit nodes and the output terminal, and a feedback block comprising a second transconductance amplifier to be coupled to the supply voltage and being coupled to the output terminal and the first and second internal circuit nodes. The input block may further include a third transconductance amplifier coupled in cascade to the first transconductance amplifier and to the first and second input terminals.