Current-Sensing IGBT Layout to Suppress Miller Plateau Sense Voltage
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Solution Overview
Problem
In semiconductor devices with built-in current detection elements, the sense voltage sharply rises during the Miller plateau, leading to potential malfunctions, especially when using low on-voltage IGBTs with high threshold voltage configurations, which are commonly used recently.
Innovation Solution
The semiconductor device incorporates a semiconductor substrate with a first IGBT portion and a second IGBT portion for current detection, where the area ratio of the impurity region on the second main surface is lower than on the first main surface, reducing the current capacity of the sense-side IGBT relative to the main-side IGBT, thereby suppressing the rise in sense voltage during the Miller plateau.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the threshold voltage of the current detection element is made larger than that of the main-side IGBT, then the sense voltage rise during Miller plateau is suppressed, but the application to low on-voltage IGBTs with high threshold voltage becomes difficult
Solution Approach 1:
The patent applies local quality by creating different impurity region configurations in different areas: the first IGBT portion has a higher impurity region area ratio (improving current capacity), while the second IGBT portion has a lower impurity region area ratio (suppressing sense voltage rise). This spatial differentiation of impurity distribution allows each IGBT portion to have optimized characteristics for its specific function.
Solution Approach 2:
The patent changes the impurity region area ratio parameter differently for the two IGBT portions. By adjusting this geometric parameter of the impurity region, the patent modifies the electrical characteristics (current capacity and threshold voltage) of each IGBT portion to achieve the desired performance: high current capacity for the main-side IGBT and suppressed sense voltage rise for the detection element.
2Reliability
If the area ratio of the impurity region within the second range is lower than within the first range, then the sense voltage rise during Miller plateau is suppressed, but the current detection accuracy may be affected
Solution Approach 1:
The patent implements local quality by configuring the impurity region area ratio specifically in the second range (corresponding to the second IGBT portion) to be lower than in the first range. This localized adjustment suppresses sense voltage rise during Miller plateau while the second IGBT portion maintains sufficient current detection capability through its optimized impurity distribution.
Data Source
AI summary
An object is to provide a technique capable of suppressing the rise in the sense voltage during the Miller plateau. A semiconductor device includes a semiconductor substrate of first conductivity type, a first IGBT portion and a second IGBT portion selectively disposed on a first main surface of the semiconductor substrate, and an impurity region of second conductivity type selectively disposed on a second main surface of the semiconductor substrate. The second IGBT portion is used to detect the current passing through the first IGBT portion. An area ratio of the impurity region within a second range to an area of the second range is lower than an area ratio of the impurity region within a first range to an area of the first range, the second range corresponding to the second IGBT portion, the first range corresponding to the first IGBT portion.