Current Sensing Circuit With Voltage Clamping for High-Speed Operation

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Solution Overview

Problem

Conventional current sensing circuits operate slowly when set to high power-supply voltage due to the need for high withstand-voltage PMOS transistors, which have larger gate capacitance, leading to slower charging and discharging.

Innovation Solution

A current sensing circuit design that uses a high withstand-voltage MOS transistor with a predetermined control voltage at its gate, clamping the drain voltage of another transistor to a lower withstand voltage, allowing operation at high power-supply voltage without the need for high withstand-voltage transistors, and includes a control voltage generation circuit to manage this voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a high withstand-voltage PMOS transistor is used to operate at high power-supply voltage, then the circuit can handle high voltage, but the gate capacitance increases causing slower charging/discharging and reduced operating speed

Engineering Contradiction:
Improvewithstand voltageVSAvoidoperating speed
Core Design Contradiction:
StrengthVSSpeed

Solution Approach 1:

The circuit segments the voltage handling function by using multiple PMOS transistors (first PMOS transistor and second PMOS transistor) with different withstand voltage requirements. The first PMOS transistor handles the high power-supply voltage, while the second PMOS transistor operates at a lower voltage level, allowing it to have smaller gate capacitance and faster switching speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first PMOS transistor acts as an intermediary that isolates the second PMOS transistor from the high power-supply voltage. By placing the first PMOS transistor between the power-supply terminal and the second PMOS transistor, it mediates the voltage level, allowing the second PMOS transistor to operate at a lower, safer voltage while still enabling the circuit to function at high voltage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If the power-supply voltage is set to high voltage, then the circuit can operate with higher power, but the operating speed becomes slow due to the need for high withstand-voltage transistors

Engineering Contradiction:
Improvepower-supply voltageVSAvoidoperating speed
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The circuit segments the voltage handling function by using multiple PMOS transistors (first PMOS transistor and second PMOS transistor) with different withstand voltage requirements. The first PMOS transistor handles the high power-supply voltage, while the second PMOS transistor operates at a lower voltage level, allowing it to have smaller gate capacitance and faster switching speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the circuit are assigned different voltage levels and transistor types based on their specific functional requirements. The first PMOS transistor is designed for high voltage operation, while the second PMOS transistor is optimized for fast switching at lower voltage, creating local quality differences that resolve the overall contradiction.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11249118B2Current sensing circuit
Publication Date: 2022.02.15 ABLIC INC
  • US11249118B2 patent drawing
  • US11249118B2 patent drawing
  • US11249118B2 patent drawing

AI summary

A current sensing circuit includes a current detection unit having a first resistance element; a first MOS-transistor and a first constant current source connected between a first output end of the current detection unit and a ground terminal; a second MOS-transistor and a second constant current source connected between a second output end of the current detection unit and the ground terminal; a third MOS-transistor having a source connected to the first output end and a gate connected to a drain of the second MOS-transistor; a second resistance element connected between an output terminal and the ground terminal; and a high withstand-voltage MOS-transistor connected between the third MOS-transistor and the output terminal to receive a predetermined control voltage, wherein the gates of the first and second MOS-transistors are commonly connected, and the gate of the first MOS-transistor is connected to the drain thereof.