Current Source Bias Rail Compensation for Fast Enable Settling
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Solution Overview
Problem
Existing current sources for low power integrated circuits face challenges in quickly enabling current while minimizing settling time, with previous solutions either wasting current, degrading settling time, or being area-intensive and sensitive to loading conditions.
Innovation Solution
A current source design featuring two switched branches with transistors and capacitors configured to generate a mirror reference voltage, where the charge removed from the bias rail by one branch is offset by the charge added by the other, achieving an optimal transistor ratio to minimize settling time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If current steering circuits are used to quickly enable current source, then switching speed is improved, but current consumption increases
Solution Approach 1:
The current source is divided into multiple parallel branches (first branch with first transistor, second branch with second transistor) that can be independently controlled. This segmentation allows selective activation of branches to achieve fast switching without requiring high current through a single steering circuit, thus reducing overall current consumption while maintaining fast enablement capability.
2Measurement precision
If closed-looped circuit is used to enable current source, then current control is improved, but settling time increases
Solution Approach 1:
Capacitors are pre-charged to specific voltages before the enable transition occurs. When the current source is enabled, these pre-charged capacitors immediately begin discharging to establish the correct current levels, eliminating the need for slow closed-loop settling. The preliminary charging action prepares the circuit state in advance, enabling fast establishment of precise current control without time-consuming feedback adjustment.
3Stability of the object's composition
If large capacitors are used to enable current source, then current stability is improved, but circuit area increases
Solution Approach 1:
Instead of using one large capacitor, the patent employs multiple smaller capacitors (first capacitor in first branch, second capacitor in second branch) distributed across different circuit branches. Each capacitor provides local charge storage and stability for its respective branch, achieving overall current stability through distributed capacitance rather than a single large capacitor, thus significantly reducing the total area required.
4Device complexity
If traditional current source switching is used, then circuit simplicity is maintained, but settling time increases
Solution Approach 1:
The patent introduces dynamic elements (switches controlled by enable signal, pre-charged capacitors) that actively adjust the circuit state during transitions. The switches dynamically connect or disconnect branches based on the enable signal, and the capacitors dynamically provide charge during switching transitions. This dynamic behavior enables fast settling without requiring complex additional control circuitry, maintaining relative simplicity while achieving rapid response.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables rapid and stable current output with negligible area increase and minimal quiescent current consumption, settling to an acceptable level within 10 nanoseconds.
Implementation Method 1
a first capacitance between the first gate and the first source; a second capacitance between the second drain and the second gate, wherein in response to the enable signal, a first charge removed from the bias rail by the first capacitor is offset by a second charge added to the bias rail by the second capacitor
Data Source
Figure 1
Figure 2
Figure 3~4
AI summary
A method for fast-enabling a current source includes conducting a first current through a first branch including a first transistor connected in series with a first switch, in response to enabling the first switch with an enable signal. A first charge is removed from a bias rail with a first capacitance between a first gate and a first source of the first transistor. A second current is conducted through a second branch including a second switch connected in series with a second transistor, in response to enabling the second switch with the enable signal. A second charge is added to the bias rail with a second capacitance between a second drain and a second gate of the second transistor, wherein the first gate and the second gate are connected to the bias rail and biased by the mirror reference voltage.