On-Chip Current Source Calibration Reducing Wire Count

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Solution Overview

Problem

Microchips require PVT independent reference currents, but routing these currents over long distances and rerouting them to multiple circuits on the chip necessitates numerous wires, occupying valuable space.

Innovation Solution

A microchip architecture that includes local bias generation circuits and calibration logic, allowing for on-chip calibration of current references using a single wire, with a PVT insensitive master current reference updating the locally generated bias current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a reference current is routed to the chip over a long distance and rerouted to all circuits on the microchip with separate wires, then each circuit receives a constant current reference, but the number of wires required increases, occupying space on the chip

Engineering Contradiction:

ImprovePVT independence of current referenceVSAvoidchip space occupied by wires

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the monolithic current reference system into a master current reference and multiple local crude bias generation circuits distributed across the chip. Each local circuit generates its own bias current independently, eliminating the need for extensive wiring while maintaining PVT independence through local calibration capability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each local crude bias generation circuit is equipped with calibration logic that enables it to self-calibrate using the master current reference. This self-service mechanism allows each circuit to maintain accurate PVT-independent current references without requiring dedicated calibration wires or external intervention for each circuit.

Inventive Principle:

Principle #25Self-service

2Area of stationary object

If local crude bias generation circuits are used to generate bias current locally, then the number of wires is reduced, but the bias current becomes sensitive to process and temperature variations

Engineering Contradiction:

Improvechip space occupied by wiresVSAvoidPVT independence of current reference

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The calibration logic implements a feedback mechanism where the locally generated bias current is compared against the PVT-independent master current reference, and correction is applied to eliminate PVT sensitivity. This feedback loop ensures that local circuits maintain accurate current references despite process and temperature variations.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The system performs preliminary calibration action by comparing the locally generated bias current with the master current reference and applying corrections before the circuit operates. This preliminary calibration ensures that each local circuit starts with an accurate PVT-independent current reference.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS7915951B1Locally calibrated current source

Publication Date: 2011.03.29 NAN YA TECH

AI summary

A microchip that can calibrate a plurality of circuits on the microchip with a current reference includes: at least a first circuit disposed on the microchip; at least a first local bias generation circuit, for generating a bias current that is input to the first circuit; an external current reference, coupled to the first local bias generation circuit, for updating the bias current; and a calibration logic, coupled to the first local bias generation circuit, for enabling the external current reference to update the bias current according to a valid calibration signal.