Clock Doubler Circuit Using Current Sources for Accurate Duty Cycle
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Solution Overview
Problem
Existing clock signal frequency multiplier circuits, such as those using phase locked loops, have high circuit complexity and power consumption, and simpler circuits like XOR-based doublers struggle to accurately achieve a desired duty cycle.
Innovation Solution
A circuit comprising a capacitor, first and second current sources, and a detector to control the capacitor's voltage, allowing for precise adjustment of the duty cycle by setting the ratio of currents, and combining signals from multiple instances to achieve higher frequency clock signals with accurate duty cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a phase locked loop (PLL) is used for clock frequency multiplication, then the output frequency can be accurately controlled, but the circuit complexity and power consumption increase significantly
Solution Approach 1:
The patent extracts only the essential frequency multiplication function from the complex PLL circuit, implementing a simplified counter-based approach that counts clock cycles directly to generate higher frequency outputs without requiring phase detectors, voltage controlled oscillators, or complex feedback loops
Solution Approach 2:
The patent uses multiple identical counter circuits operating in parallel to achieve frequency multiplication, where each counter copies the same simple logic structure but operates with different modulus values to generate different output frequencies, avoiding the need for complex control logic
2Device complexity
If a simple XOR gate with delay cell is used for clock frequency doubling, then the circuit complexity is reduced, but the duty cycle control becomes inaccurate
Solution Approach 1:
The patent implements feedback mechanisms where the output of each counter is fed back to control its operation, allowing the circuit to self-regulate and maintain accurate duty cycles. The counter circuits use feedback to precisely control the duration of output pulses, ensuring accurate duty cycle control without requiring complex external timing circuits
Solution Approach 2:
The patent controls duty cycle accuracy by changing the operational parameters of the counter circuits, specifically by adjusting the modulus values and clock division ratios to achieve precise duty cycle control. This allows accurate duty cycle setting through parameter selection rather than requiring complex additional circuitry
3Manufacturing precision
If multiple current sources are used to control capacitor voltage for signal generation, then the duty cycle control precision is improved, but the power consumption increases
Solution Approach 1:
The patent uses periodic switching of current sources to charge and discharge the capacitor, where the current sources are activated only during specific phases of the clock cycle. This periodic operation allows precise duty cycle control through timed current application while keeping the average power consumption low by ensuring current sources are inactive during portions of each cycle
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the circuit design, reduces power consumption, and enables accurate control of duty cycles, allowing for efficient multiplication of clock signal frequencies while maintaining precise duty cycle settings.
Implementation Method 1
a capacitor; a first current source for one of charging and discharging the capacitor over a first time period
Implementation Method 2
a second current source for one of discharging and charging the capacitor over a first portion of a second time period
Implementation Method 3
a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor
Data Source
AI summary
Apparatus for producing a signal, comprising a capacitor; a first current source for one of charging and discharging the capacitor over a first time period; a second current source for one of discharging and charging the capacitor over a first portion of a second time period; a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor; and an apparatus output for indicating when the voltage across the capacitor is one of above and below the first voltage.