Differential Current-Source Circuitry for Weighted Sum Computation
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Solution Overview
Problem
Traditional digital circuitry for implementing artificial intelligence models, such as neural networks, requires significant resources in terms of space, energy, and latency, making them unsuitable for edge devices due to their large size and energy consumption, which leads to delays in processing and inference generation, especially in remote or field devices.
Innovation Solution
A mixed-signal integrated circuit architecture utilizing programmable current sources, differential current circuits, and common-mode current circuits to perform weighted sum computations efficiently, reducing the need for large digital memory and energy consumption by processing computations in the analog domain and converting results to digital outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional digital circuitry is used for weighted sum computations, then computation accuracy is maintained, but circuit area and energy consumption increase significantly
Solution Approach 1:
The patent replaces traditional digital circuitry with mixed-signal circuitry that uses analog current sources to perform weighted sum computations. Current sources generate analog currents proportional to weight values, and these currents are summed directly in the analog domain, eliminating the need for digital multiplication and addition operations. This substitution of analog physical processes for digital computational processes significantly reduces circuit area while maintaining computation accuracy.
2Measurement precision
If traditional digital circuitry is used for weighted sum computations, then computation accuracy is maintained, but energy consumption increases significantly
Solution Approach 1:
The patent replaces energy-intensive digital computation with energy-efficient analog current summation. In the analog domain, weighted values are represented by current magnitudes from current sources, and the weighted sum is obtained by directly summing these currents at a summation node. This physical current summation process consumes significantly less energy than digital multiplication and addition operations while preserving computation accuracy through precise current control.
3Power
If remote computing systems are used for AI processing, then compute power is sufficient, but latency increases due to network transmission
Solution Approach 1:
The patent enables segmentation of AI processing functions by implementing lightweight mixed-signal computation circuits that can be deployed at edge devices. Instead of concentrating all compute power in remote systems, the patent's efficient mixed-signal circuitry allows inference operations to be performed locally at distributed edge nodes, reducing network transmission latency while maintaining sufficient compute power for real-time applications.
4Loss of time
If AI processing is implemented at edge devices, then latency is reduced, but device size and power requirements increase
Solution Approach 1:
The patent implements AI processing at edge devices using mixed-signal circuitry that replaces bulky digital computation units with compact analog current source arrays. The current sources and summation circuits occupy minimal device area compared to digital processors, enabling real-time inference at the edge without significantly increasing device size. This analog implementation maintains low latency while keeping edge devices compact and power-efficient.
Data Source
AI summary
An integrated circuit and method are provided for performing weighted sum computations. The circuit includes: a plurality of current generators interconnected and arranged into pairs, a positive summation node, a negative summation node, and an input generation circuit. For each pair of current generators, the control terminal of each element is electrically connected to an input node. One of the current generators has its drain connected to the positive summation node while the other current generation element has its drain connected to the negative summation node. The remaining terminals on both current generators are connected to a reference, which may be shared. Each pair of current generator source predetermined amounts of current onto the two summation nodes when the following conditions occur: the input node is at an activation voltage, and the two summation nodes are at a predetermined target voltage.


