Curved Conductive Structure for Wafer-Level Package Probing

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Solution Overview

Problem

Existing wafer-level package structures face challenges in achieving optimal probing interfaces for miniature pins due to flat conductive structures, leading to suboptimal electrical contact and increased material waste during packaging processes.

Innovation Solution

A semiconductor device structure is formed with a conductive structure having a concave or convex profile, achieved through controlled etching of a conductive layer after forming a redistribution layer and a protection layer, allowing for improved electrical contact and reduced material usage by avoiding chemical mechanical polishing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a flat conductive structure is used in existing WLP structures, then the manufacturing process is simpler, but the electrical contact with miniature pins is suboptimal and material waste increases

Engineering Contradiction:

Improveelectrical contact qualityVSAvoidconductive structure profile

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies curvature by forming a non-flat conductive structure with a concave or convex profile instead of a flat surface. This curved profile optimizes the probing interface for miniature pins, enhancing electrical contact quality while maintaining manufacturing feasibility through controlled etching processes

Inventive Principle:

Principle #14Spheroidality (Curvature)

2Manufacturing precision

If chemical mechanical polishing is used to achieve flat surfaces, then the surface is smooth, but material waste increases and the process becomes more complex

Engineering Contradiction:

Improvesurface flatnessVSAvoidmaterial waste

Core Design Contradiction:

Manufacturing precisionVSLoss of substance

Solution Approach 1:

Instead of starting with a flat surface and removing material to create features, the patent inverts the approach by forming a non-flat conductive structure directly through controlled etching. This eliminates the need for subsequent chemical mechanical polishing steps, reducing material waste while achieving the required surface precision

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts the unnecessary chemical mechanical polishing step from the manufacturing process by directly forming the non-flat conductive structure through etching. This removes the source of material waste associated with polishing while maintaining the required surface quality for optimal electrical contact

Inventive Principle:

Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The non-flat top surface of the conductive structure enhances electrical conductivity and adhesion, improving probing efficiency and reducing material waste, while maintaining a streamlined and cost-effective packaging process.

Implementation Method 1

achieved through controlled etching of a conductive layer

Methodology Applied

Scientific EffectEtching:

Data Source

PatentUS10978363B2Semiconductor structure with conductive structure

Publication Date: 2021.04.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a conductive pad formed over a substrate, and a conductive structure formed over the conductive pad. The conductive structure has a curved top surface. The semiconductor device structure also includes a protection layer between the conductive pad and the conductive structure. A lowest point of the curved top surface of the conductive structure is higher than a topmost surface of the protection layer.