Curved Die Stack Structure for CTE Stress and Delamination
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller, faster, and more efficient packaging techniques for semiconductor dies due to issues like stress-induced cracks and delamination caused by coefficient of thermal expansion (CTE) mismatch, particularly with sharp corners in existing die stack structures.
Innovation Solution
A die stack structure is developed with a first die having a stepped profile with non-sharp corners, where the body portion is uncovered by a flange portion, and an encapsulant laterally encapsulates the dies, reducing stress and preventing cracks and delamination by using a redistribution layer and hybrid bonding interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional die stack structures with sharp corners are used, then manufacturing and assembly are simpler, but stress-induced cracks and delamination occur due to CTE mismatch
Solution Approach 1:
The patent applies curvature by replacing sharp corners with rounded corners on the die structures. This geometric modification redistributes stress concentrations that occur at sharp corners during thermal cycling, thereby preventing stress-induced cracks and delamination while maintaining structural integrity and reliability
Solution Approach 2:
The patent segments the die structure into a body portion and a flange portion, where the flange portion extends beyond the body portion perimeter. This segmentation allows the flange to act as a stress-relief feature that accommodates CTE mismatch between different materials in the stack, reducing delamination risk
2Productivity
If die size is reduced to increase integration density, then more components fit in given area, but stress concentration increases at corners
Solution Approach 1:
By rounding the corners of miniaturized dies, the patent eliminates stress concentration points that would be particularly problematic at smaller scales. This allows higher integration density to be achieved without compromising reliability due to stress-induced failures
3Reliability
If encapsulant is added to laterally encapsulate dies, then stress is reduced and cracks are prevented, but device complexity increases
Solution Approach 1:
The patent merges the encapsulant function with the existing die stack structure by laterally encapsulating the dies within the same package footprint. This integration provides crack prevention and stress relief without significantly increasing device complexity or requiring separate encapsulation modules
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces stress-induced cracks and delamination in the die stack structure, enhancing the reliability and performance of the semiconductor package by eliminating sharp corners and managing CTE mismatch, thereby improving integration density and efficiency.
Implementation Method 1
stress-induced cracks and delamination caused by coefficient of thermal expansion (CTE) mismatch
Data Source
AI summary
A die stack structure including a first die, an encapsulant, a redistribution layer and a second die is provided. The encapsulant laterally encapsulates the first die. The redistribution layer is disposed below the encapsulant, and electrically connected with the first die. The second die is disposed between the redistribution layer and the first die, wherein the first and second dies are electrically connected with each other, the second die comprises a body portion having a first side surface, a second side surface and a curved side surface therebetween, and the curved side surface connects the first side surface and the second side surface.