Curved Diffusion Barrier for Interconnect Reliability

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Solution Overview

Problem

As integrated circuits are scaled down, the increased interconnect capacitance due to reduced line-to-line spacing and thicker interconnect lines leads to electrical migration and reduced reliability, particularly when using low-k dielectric materials, which are problematic due to electrical weakness at the interface between metal lines and cap layers.

Innovation Solution

A method involving a substrate with a low-k dielectric layer that undergoes two shrinking processes, including a curing treatment to reduce porosity and enhance mechanical properties, and the formation of a diffusion barrier layer with a curved interface to increase the electrical migration path, thereby improving the diffusion barrier and reducing electrical migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If low-k dielectric materials are used to reduce interconnect capacitance, then capacitance is reduced, but the interface between metal lines and cap layers becomes electrically weak leading to electrical migration

Engineering Contradiction:
Improveinterconnect reliabilityVSAvoidelectrical migration
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A curved interface structure is introduced as an intermediary between the low-k dielectric layer and the cap layer. This curved interface acts as a mediator that lengthens the electrical migration path, thereby reducing electrical migration while maintaining the benefits of low-k dielectric materials for capacitance reduction.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The interface between the low-k dielectric layer and the cap layer is designed with a curved profile rather than a flat interface. This curvature increases the path length for electrical migration, effectively reducing the harmful effects of electrical migration while preserving the low capacitance benefits of the low-k material.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Productivity

If line-to-line spacing is reduced to increase device density, then device density increases, but interconnect capacitance increases

Engineering Contradiction:
Improvedevice densityVSAvoidinterconnect capacitance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The curved interface profile between the low-k dielectric layer and cap layer reduces the effective overlapping area between adjacent interconnect lines, thereby reducing capacitance even when line-to-line spacing is reduced to achieve higher device density.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances the reliability of interconnect structures by reducing porosity, improving the diffusion barrier, and prolonging the electrical migration path, leading to increased mean time to failure and improved circuit performance.

Implementation Method 1

performing a first shrinking process wherein the dielectric layer shrinks and has a first shrinkage rate... performing a second shrinking process after the step of forming the conductive feature, wherein the dielectric layer substantially shrinks and has a second shrinkage rate

Methodology Applied
Scientific EffectShrinkage: Thermal Contraction

Data Source

PatentUS8212330B2Process for improving the reliability of interconnect structures and resulting structure
Publication Date: 2012.07.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8212330B2 patent drawing
  • US8212330B2 patent drawing
  • US8212330B2 patent drawing

AI summary

An interconnect structure of an integrated circuit having improved reliability and a method for forming the same are provided. The method includes providing a substrate, forming a dielectric layer overlying the substrate, performing a first shrinking process, wherein the dielectric layer shrinks and has a first shrinkage rate, forming a conductive feature in the dielectric layer after the step of performing the first shrinking process, and performing a second shrinking process after the step of forming the conductive feature, wherein the dielectric layer substantially shrinks and has a second shrinkage rate.