Curved Gate FET Active Layer Extension

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Solution Overview

Problem

Field Effect Transistors (FETs) with interdigitated source and drain fingers have an inefficient use of semiconductor area due to the active layer extending only under the straight portions of the meandering gate region, limiting the effective control of current flow and increasing the device area for a given gate length.

Innovation Solution

The active layer extends beneath the entire meandering gate region, including curved portions beyond the ends of the electrode fingers, optimizing the semiconductor area usage and enhancing control over current flow between the source and drain electrodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the active layer extends only under the straight portions of the meandering gate region, then the manufacturing process is simpler, but the semiconductor area usage is inefficient and the device area increases for a given gate length

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddevice area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The active layer is extended into the curved portions of the meandering gate region, utilizing the vertical dimension beneath the gate structure to increase effective gate length without increasing the horizontal footprint. This allows the active layer to occupy the space under the curved gate portions that were previously unused, thereby improving area efficiency while maintaining manufacturing simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the active layer extends under the curved portions of the gate region, then the semiconductor area usage is optimized, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvesemiconductor area usageVSAvoidalignment precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The meandering gate region is segmented into straight portions and curved portions, with the active layer extending continuously beneath both. This segmentation allows the manufacturing process to treat different regions appropriately, using standard alignment techniques for straight portions while the curved portions benefit from the continuous extension of the active layer, thereby managing precision requirements effectively.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If the active layer extends only under straight portions, then the gate control over current flow is limited, but the device structure is simpler

Engineering Contradiction:
Improvecurrent control efficiencyVSAvoidstructural complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The active layer is merged to extend continuously from under the straight portions into the curved portions of the meandering gate region. This merging creates a unified active region that is fully controlled by the gate electrode, improving current control efficiency by ensuring the gate can modulate carrier flow throughout the entire active layer length without introducing additional structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the substrate area required by the transistor, improving the efficiency of current control and reducing the overall size of the FET, while maintaining effective operation across the entire gate region.

Implementation Method 1

Field Effect Transistor (FET)... the active layer being adapted to change between on and off states on application of a voltage to the gate electrode

Methodology Applied
Scientific EffectField Effect: Electric Field

Data Source

PatentUS7939866B2Field effect transistor
Publication Date: 2011.05.10 QORVO US INC
  • US7939866B2 patent drawing
  • US7939866B2 patent drawing
  • US7939866B2 patent drawing

AI summary

A transistor includes a first electrode on a substrate, wherein the first electrode comprises a bus bar and has first and second first electrode fingers extending therefrom, the fingers being spaced apart to define a channel therebetween. The transistor also includes a second electrode on the substrate having a second electrode finger spaced apart from the first electrode and extending along the channel to define a gate region between the fingers. The gate region comprises a “curved” portion beyond the end of the second electrode finger proximate to the bus bar of the first electrode and a gate electrode extends along the gate region, through the “curved” gate portion. The substrate further comprises an active layer beneath the gate region, characterized in that the active layer extends beyond the end of the second electrode finger beneath the “curved” portion of the gate region.