Curved Interconnects via Sacrificial Trace Removal
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Solution Overview
Problem
Conventional interconnect structures in printed circuit boards and interposers are limited to straight metal lines, which restricts the formation of orthogonal and curved pathways, leading to longer interconnects, higher latency, and higher impedance in electronic devices.
Innovation Solution
A method involving a sacrificial trace structure formed using additive manufacturing, followed by the deposition of a continuous seed metal layer and subsequent removal of the sacrificial structure, allowing for the formation of non-linear interconnects with orthogonal and curved paths, encapsulated in a dielectric material with exposed ends for solder bump connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional straight metal lines are used in interconnect structures, then the manufacturing process is simple, but the interconnect length increases leading to higher latency and impedance
Solution Approach 1:
The patent applies curvature by replacing conventional straight metal lines with curved metal traces that follow orthogonal pathways through the substrate. The curved traces enable shorter interconnect paths by routing metal lines through diagonal and orthogonal directions rather than being constrained to straight horizontal or vertical lines, thereby reducing interconnect length, latency, and impedance while maintaining manufacturability through standard PCB fabrication processes.
2Ease of manufacture
If conventional straight metal lines are used, then the manufacturing process is straightforward, but orthogonal and curved pathways cannot be formed
Solution Approach 1:
The patent implements curved and orthogonal interconnect geometries by routing metal traces along diagonal paths at 45-degree angles and other non-traditional orientations. This enables the formation of L-shaped, T-shaped, and curved interconnect patterns that were not achievable with conventional straight-line routing, while still using standard PCB manufacturing techniques such as photolithography and copper plating.
Solution Approach 2:
The patent extends interconnect routing beyond the traditional two-dimensional plane by utilizing diagonal directions and three-dimensional pathways through multi-layer substrates. This dimensional expansion allows metal lines to traverse the substrate more efficiently by combining horizontal, vertical, and diagonal routing segments, creating orthogonal pathways that reduce overall interconnect length and improve signal performance.
3Device complexity
If straight metal lines are used, then the interconnect structure is simple, but latency and impedance increase
Solution Approach 1:
The patent reduces signal latency and impedance by implementing curved metal traces that create shorter electrical pathways through the substrate. The orthogonal and diagonal routing patterns reduce the total trace length compared to conventional straight-line routing, thereby decreasing signal propagation time and impedance while maintaining a relatively simple interconnect structure that can be manufactured using standard PCB processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the creation of shorter interconnects with lower latency and impedance by allowing for curved and orthogonal metal lines, improving electrical communication across interposers and printed circuit boards.
Implementation Method 1
providing a sacrificial trace structure using an additive forming method
Implementation Method 2
forming a continuous seed metal layer on the sacrificial trace structure
Data Source
AI summary
A method of forming an interconnect that includes providing a sacrificial trace structure using an additive forming method. The sacrificial trace structure having a geometry for the interconnect. The method continuous with forming a continuous seed metal layer on the sacrificial trace structure; and removing the sacrificial trace structure, wherein the continuous seed metal layer remains. An interconnect metal layer may be formed on the continuous seed layer. A dielectric material may then be formed on the interconnect metal layer to encapsulate a majority of the interconnect metal layer, wherein ends of the interconnect metal layer are exposed through one surface of the dielectric material to provide an interconnect extending into a dielectric material.