Curved Mold Layer for Semiconductor Package Structural Stability
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Solution Overview
Problem
Semiconductor packages face challenges in achieving structural stability and reducing failure rates due to increased integration of circuits in compact spaces, where traditional wire bonding technologies are insufficient for high performance requirements.
Innovation Solution
A semiconductor package manufacturing method involving a carrier substrate with a trench, where a mold layer is formed around the chip stack to protect the bottom corner and enhance structural stability, including a first segment surrounding lateral surfaces and a second segment extending to cover the edge of the bottom surface, using an epoxy molding compound to prevent mechanical impact and ensure proper mounting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple integrated circuits are stacked in a compact package to increase integration, then circuit integration is improved, but structural stability deteriorates
Solution Approach 1:
The mold layer is divided into two segments: a first segment that surrounds the lateral surfaces of the chip stack, and a second segment that extends from the bottom end of the first segment to cover the bottom corner. This segmentation allows each part to perform its specific function optimally - the first segment provides lateral protection and support, while the second segment specifically protects the vulnerable bottom corner area, together resolving the structural stability issue in compact packages.
Solution Approach 2:
The mold layer extends not only laterally around the chip stack but also downward to cover the bottom corner area, adding vertical dimension coverage. This multi-dimensional protection approach ensures comprehensive structural support and stability for the stacked integrated circuits in compact packaging configurations.
2Reliability
If the mold layer covers the bottom corner to protect from mechanical impact, then reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The mold layer is divided into two segments: a first segment that surrounds the lateral surfaces of the chip stack, and a second segment that extends from the bottom end of the first segment to cover the bottom corner. This segmentation allows each part to perform its specific function optimally - the first segment provides lateral protection and support, while the second segment specifically protects the vulnerable bottom corner area, together resolving the structural stability issue in compact packages.
Solution Approach 2:
The second segment of the mold layer is specifically positioned to cover the bottom corner area, which is identified as a vulnerable point susceptible to mechanical impact. This localized protection approach applies enhanced coverage precisely where needed without unnecessarily complicating the overall mold layer structure, balancing reliability improvement with manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method increases structural stability and reduces failure rates by protecting the sensitive bottom corner of the chip stack and ensuring secure mounting, while maintaining a minimum under-fill gap for effective electrical connectivity.
Implementation Method 1
coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip
Implementation Method 2
curing the mold member to form a mold layer
Data Source
AI summary
Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip.


