Curved Semiconductor Structure for Memory Capacitor Area Expansion
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Solution Overview
Problem
Existing semiconductor memory devices face limitations due to inadequate space for storage nodes and capacitor materials, leading to reduced functionality and potential electrical shorts, particularly with surface areas less than 8.0 nanometers.
Innovation Solution
The implementation of a semiconductor structure with curved surfaces formed using a redistribution layer (RDL) reverse damascene process, which creates a larger spacer area by forming a curved interface between metal and insulative materials, increasing the surface area for capacitor deposition and reducing electrical shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conventional planar structure is used for memory device fabrication, then the fabrication process is simple, but the surface area for capacitor deposition is insufficient (less than 8.0 nanometers) leading to electrical shorts and reduced functionality
Solution Approach 1:
The patent applies curvature by forming a curved surface in the insulative material using a rounded etch profile during the RDL reverse damascene process. This curved surface, rather than a planar interface, increases the surface area available for capacitor material deposition while maintaining compatibility with standard fabrication processes. The curvature is achieved through controlled etching that creates a rounded transition between the metal material and insulative material layers.
Solution Approach 2:
The patent transitions from a two-dimensional planar interface to a three-dimensional curved surface by modifying the etch profile to create a rounded surface. This dimensional change increases the effective surface area for capacitor deposition without significantly increasing the footprint or requiring additional fabrication steps, thereby resolving the contradiction between area and complexity.
2Reliability
If the surface area for capacitor deposition is increased to prevent electrical shorts, then device functionality improves, but the fabrication process becomes more complex
Solution Approach 1:
The curved surface created through rounded etching provides increased surface area for capacitor deposition, improving device functionality and reliability. The process integrates this curvature formation into the existing RDL reverse damascene flow, maintaining ease of manufacture by using standard etching equipment and processes rather than requiring complex additional fabrication steps.
Solution Approach 2:
The patent modifies the etch profile parameters to create a rounded surface instead of a sharp interface. By adjusting etch chemistry, power, and other process parameters, the curved surface is formed with controlled dimensions that provide sufficient surface area for reliable capacitor deposition while maintaining compatibility with existing manufacturing capabilities.
3Area of stationary object
If a curved surface is formed in the insulative material, then the surface area for capacitor placement increases, but the manufacturing precision requirements increase
Solution Approach 1:
The curved surface is formed using a rounded etch profile that creates a smooth, continuous curvature rather than sharp transitions. This approach increases surface area while being tolerant to normal process variations, as the rounded profile naturally averages out minor manufacturing imperfections. The curvature radius is controlled to provide sufficient surface area without requiring extreme manufacturing precision.
Solution Approach 2:
By optimizing etch parameters such as power, chemistry, and timing, the patent achieves consistent curved surface formation with controlled precision. The process parameters are tuned to create a rounded profile that provides the necessary surface area while remaining robust to typical manufacturing variations, thereby balancing area increase with manufacturing precision requirements.
Data Source
AI summary
Methods, apparatuses, and systems related to semiconductor structure with curved surfaces are described. An example apparatus includes a semiconductor structure comprising a patterned material comprising active areas, a first conductive material on a surface of each active area, and a first metal material on a surface of each first conductive material. The patterned material further includes a second and third conductive material, a first nitride material, and a second nitride material separating each active area, first conductive material, and first metal material from each second and third conductive material, and first nitride material. The apparatus includes a curved surface formed on a portion of the first metal material and second nitride material. The apparatus further includes a first layer comprising an oxide material and a second metal material on the patterned material, where the oxide material contacts the curved surface.


