Curvilinear IC Interconnect Layout for RC-Aware Routing

The patent applies curvilinear routing instead of rectilinear conventions, allowing wire paths to follow curved trajectories that optimize RC time constants. The shape optimizer modifies wire geometry to achieve better electrical performance while remaining manufacturable at nanometer process nodes.

The patent changes the geometric parameters of interconnect shapes from fixed rectilinear forms to variable curvilinear forms. The shape optimizer adjusts wire width, curvature, and path geometry to minimize RC time constants, transforming the routing from rigid grid-based paths to flexible continuous curves.

The patent replaces traditional mechanical grid-based routing algorithms with a physics-based optimization approach. Instead of moving wires along discrete grid steps, the system uses electromagnetic field simulations and RC time constant calculations to guide wire placement, substituting physical field theory for mechanical routing rules.

The shape optimizer performs self-service optimization by automatically adjusting wire geometries based on RC time constant calculations. The system iteratively refines interconnect shapes without requiring manual intervention, using first-principles physics to guide the optimization process.

The patent performs preliminary shape optimization during the global routing stage rather than waiting for detailed routing. By calculating and optimizing RC time constants early in the design process, the system establishes optimized wire paths that guide subsequent detailed routing, reducing the need for iterative adjustments later.

The patent merges global routing and detailed routing objectives by integrating RC time constant optimization into the early routing stages. Instead of treating global and detailed routing as separate sequential processes, the system combines geometric optimization considerations throughout the routing workflow, reducing total computational time.