Cut Gate Dielectric Structure for FinFET Source/Drain Protection
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Solution Overview
Problem
The semiconductor industry faces challenges in fabricating FinFET devices with reduced dimensions and high performance, particularly in protecting epitaxial source/drain structures from damage during the cut metal gate (CMG) process, which can lead to increased risk of damage and reduced source/drain contact area.
Innovation Solution
A helmet layer is introduced to protect the epitaxial source/drain structures during the CMG process, and a specific etchant gas with high molecular weight is used to form trenches between the epitaxial source/drain structures, ensuring minimal lateral etching and maintaining the integrity of these structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the cut metal gate (CMG) process is used to reduce dimensions and improve performance, then device density and performance are improved, but the epitaxial source/drain structures are damaged
Solution Approach 1:
A helmet layer is introduced as an intermediary protective structure between the etchant and the epitaxial source/drain structures. This helmet layer acts as a mediator that absorbs the harmful effect of the CMG process while allowing the desired gate cutting function to proceed, thereby protecting the epitaxial structures from damage during the dimension reduction process
2Ease of manufacture
If standard etching processes are used during CMG, then the gate structure can be cut, but lateral etching damages the epitaxial source/drain structures
Solution Approach 1:
The etching process parameters are changed by selecting an etchant gas with high molecular weight. This parameter change modifies the etching behavior to reduce lateral etching while maintaining vertical etching capability, allowing gate cutting to proceed without damaging the epitaxial source/drain structures through uncontrolled lateral erosion
3Productivity
If the source/drain contact area is increased to improve performance, then current flow is improved, but the risk of damage during CMG process increases
Solution Approach 1:
The helmet layer is formed beforehand to cushion and protect the epitaxial source/drain structures from damage during the CMG process. This pre-established protective layer allows the source/drain contact area to be increased for improved current flow without proportionally increasing the damage risk, as the helmet layer absorbs the harmful effects of the etching process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The helmet layer effectively prevents damage to the epitaxial source/drain structures during the CMG process, allowing for increased size of merged epitaxial materials and improved contact area while maintaining the structural integrity of the semiconductor device.
Implementation Method 1
etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure
Data Source
AI summary
A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.