Cut-Through Forwarding Module With Deterministic Latency Control
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Solution Overview
Problem
Cut-through forwarding systems require tight control over latency and jitter to ensure deterministic behavior and scalability across multiple protocols, but conventional solutions using dedicated hardware blocks are expensive, inflexible, and require separate blocks for each mode, leading to increased cost and power consumption.
Innovation Solution
An integrated circuit device with a cut-through forwarding module that uses a RISC processor and delimiter component to segment data into blocks, allowing for deterministic latency and zero jitter by triggering transmission after receiving a predefined number of bytes, enabling consistent latency and jitter control across multiple protocols without the need for dedicated hardware blocks for each mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware blocks are used for each cut-through forwarding mode, then latency and jitter control is improved, but device complexity and cost increase
Solution Approach 1:
The patent implements a universal cut-through forwarding module that can handle multiple protocols (EtherCAT, PROFINET, Ethernet/IP, etc.) through software configuration rather than dedicated hardware blocks. The module uses a programmable processor to dynamically adjust forwarding parameters for different protocols, eliminating the need for separate hardware implementations for each protocol while maintaining deterministic latency and jitter control.
Solution Approach 2:
The patent changes the approach from fixed hardware parameters to dynamically adjustable software parameters. The cut-through forwarding module allows configuration of forwarding behavior, latency targets, and jitter parameters through software, enabling the same hardware to adapt to different protocol requirements without physical reconfiguration.
2Reliability
If separate dedicated hardware blocks are implemented for each protocol, then deterministic behavior is ensured, but power consumption increases
Solution Approach 1:
The patent employs a single universal cut-through forwarding module that can be software-configured to handle multiple industrial protocols deterministically. This eliminates the need to power multiple dedicated hardware blocks simultaneously, as only one module needs to be active regardless of how many protocols are supported, significantly reducing overall power consumption while maintaining deterministic behavior.
3Adaptability or versatility
If multiple dedicated hardware blocks are used to support multiple cut-through modes, then scalability is improved, but real estate requirements increase
Solution Approach 1:
The patent implements a single scalable cut-through forwarding module that supports multiple protocols through software configuration rather than proliferating dedicated hardware blocks across the chip. This universal module can be instantiated once and configured for different protocols as needed, dramatically reducing the silicon real estate required compared to having separate hardware blocks for each protocol while maintaining full multi-protocol support capability.
Solution Approach 2:
The patent merges the functionality of multiple protocol-specific forwarding blocks into a single unified cut-through forwarding module. By combining what would traditionally be separate hardware implementations into one shared resource that uses software to differentiate protocol handling, the patent reduces the total chip area required while preserving all necessary protocol support capabilities.
Data Source
AI summary
An integrated circuit device (105) comprises a cut-through forwarding module (100). The cut-through forwarding module (100) comprises at least one receiver component (120) arranged to receive data to be forwarded, and at least one transmitter component (130) arranged to transmit data stored within at least one transmitter buffer (135) thereof. The cut-through forwarding module (100) further comprises at least one delimiter component (150) arranged to trigger a transmission of frame data within the at least one transmitter buffer (135), upon receipt of a first number of data elements (Y) (414, 424, 434, 444) of a respective data frame (410, 420, 430, 440) by the at least one receiver component (120), the first number of data elements (Y) comprising a first predefined integer value.


