CVD Boron Etch-Stop Layer for CMOS Scalability
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Solution Overview
Problem
Boron etch-stop layers in semiconductor fabrication exhibit significant diffusion at elevated temperatures, leading to non-uniformity and integration issues in advanced device manufacturing, particularly in BESOI processing, due to wide boron profiles resulting from ion implantation.
Innovation Solution
A boron-doped nanoscale etch-stop layer is formed using chemical vapor deposition (CVD) with incorporated germanium and carbon, which maintains a narrow profile even after thermal treatments up to 1000°C, reducing boron outdiffusion and enhancing selectivity through controlled gas flows and pressures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is used to form boron etch-stop layer, then the etch-stop function is achieved, but the boron profile becomes wide causing diffusion and non-uniformity at elevated temperatures
Solution Approach 1:
The patent changes the formation method parameter from ion implantation to in-situ doped CVD, which fundamentally alters how boron is incorporated into the silicon layer. This parameter change results in a narrow boron profile (less than 100 nm FWHM) that remains stable at elevated temperatures up to 1000°C, resolving the contradiction between achieving etch-stop function and maintaining profile precision
Solution Approach 2:
The patent creates a composite structure by incorporating boron-doped silicon within a CVD-formed silicon layer. This composite approach allows the boron to be precisely distributed during deposition rather than implanted afterward, achieving both the etch-stop function and narrow profile precision simultaneously
2Manufacturing precision
If in-situ doped CVD is used to form boron etch-stop layer, then narrow profile and reduced diffusion are achieved, but the deposition process complexity increases
Solution Approach 1:
The patent merges the silicon deposition process with boron doping into a single in-situ CVD step. By combining these two operations that would otherwise be separate (silicon deposition followed by boron implantation), the process achieves narrow boron profiles without requiring additional complex post-processing steps
Solution Approach 2:
The patent replaces the mechanical ion implantation process with a chemical vapor deposition process. This substitution eliminates the need for complex ion sources, acceleration systems, and implantation control mechanisms, simplifying the overall equipment requirements while achieving superior profile control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CVD-based boron etch-stop layer achieves a full-width half-maximum thickness of less than 100 nanometers, significantly reducing parasitic capacitances and improving scalability and sub-threshold slopes in CMOS devices while minimizing boron diffusion, thus addressing the challenges of non-uniformity and integration.
Implementation Method 1
a boron layer formed by a chemical vapor deposition (CVD) system
Implementation Method 2
the boron layer has a full-width half-maximum (FWHM) thickness value of less than 100 nanometers... even when subjected to elevated temperatures
Data Source
AI summary
A method for forming an etch-stop layer and a resulting structure fabricated therefrom. The etch-stop layer has a semiconductor layer having a first surface and a boron layer formed below the first surface of the semiconductor layer. The boron layer has a full-width half-maximum (FWHM) thickness value of less than 100 nanometers. The boron layer is formed by a chemical vapor deposition (CVD) system.