CXL Buffer Memory for DRAM-Less Storage Power-Loss Protection

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Solution Overview

Problem

Storage systems with DRAM-less storage devices face performance degradation and data loss in sudden power off conditions due to the absence of a buffer memory and power loss protection, which increases the risk of data integrity issues and manufacturing costs.

Innovation Solution

Incorporating a CXL memory expander as a buffer memory and a power loss protection capacitor outside the DRAM-less storage devices, which manages mapping data and supplies auxiliary power in sudden power off conditions, while maintaining data integrity through erasure codes and end-to-end data protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If DRAM-less storage devices are used to reduce cost, then manufacturing cost is reduced, but performance and data integrity deteriorate due to absence of buffer memory

Engineering Contradiction:
Improvemanufacturing costVSAvoiddata integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a CXL memory expander as an intermediary component between the host and DRAM-less storage devices. This expander provides the buffer memory function that would otherwise be provided by DRAM, enabling data integrity protection without requiring expensive DRAM components in each storage device. The expander acts as a mediator that handles mapping data and buffer operations centrally.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer memory function is extracted from the individual storage devices and consolidated into a separate CXL memory expander. This allows each storage device to remain simple and cost-effective while the system as a whole gains the reliability benefits of buffer memory through the external expander component.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of manufacture

If DRAM-less storage devices are used to reduce cost, then manufacturing cost is reduced, but performance deteriorates due to absence of buffer memory

Engineering Contradiction:
Improvemanufacturing costVSAvoidperformance
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The CXL memory expander serves as a mediator that provides buffer memory capabilities to the DRAM-less storage system, enabling high-performance operations such as data mapping and caching without requiring expensive DRAM components in each storage device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The CXL memory expander performs multiple functions including buffer memory operations, mapping data management, and data caching, thereby providing comprehensive performance enhancement to the DRAM-less storage system through a single multi-functional component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If no power loss protection is provided to reduce cost, then manufacturing cost is reduced, but data loss risk increases in sudden power off conditions

Engineering Contradiction:
Improvemanufacturing costVSAvoiddata loss risk
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The PLP capacitor in the CXL memory expander acts as an intermediary power protection mechanism that protects the entire DRAM-less storage system from sudden power loss. Instead of requiring expensive per-device protection, a single external capacitor provides system-wide power loss protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The PLP capacitor is positioned to provide beforehand cushioning against sudden power loss events. It stores energy in advance and releases it during power failure to maintain operation of the CXL memory expander, ensuring mapping data is preserved and no data loss occurs.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Device complexity

If mapping data is stored in volatile memory without protection, then device complexity is reduced, but data integrity deteriorates in power loss conditions

Engineering Contradiction:
Improvedevice complexityVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The CXL memory expander with PLP capacitor serves as an intermediary protection layer that safeguards volatile mapping data without requiring each storage device to implement its own protection mechanisms, maintaining simplicity while ensuring integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The PLP capacitor provides beforehand cushioning by maintaining power supply to the CXL memory expander during sudden power loss, ensuring that volatile mapping data is preserved and properly flushed to non-volatile storage before power completely fails.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances performance and storage capacity with reduced manufacturing costs by stabilizing data operations and preventing loss, even in sudden power off scenarios, through the use of a CXL memory expander and PLP capacitor.

Implementation Method 1

a power loss protection (PLP) capacitor... supplies an auxiliary power voltage to the plurality of DRAM-less storage devices and the at least one CXL memory expander in a sudden power off (SPO) condition

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12579035B2Storage system and data center including the same
Publication Date: 2026.03.17 SAMSUNG ELECTRONICS CO LTD
  • US12579035B2 patent drawing
  • US12579035B2 patent drawing
  • US12579035B2 patent drawing

AI summary

A storage system includes a plurality of DRAM-less storage devices, a CXL memory expander, and a PLP capacitor. The DRAM-less storage devices include nonvolatile memories as a storage medium, and a DRAM is omitted in the DRAM-less storage devices. The CXL memory expander is electrically connected to the DRAM-less storage devices, communicates through a CXL interface and operates as a buffer memory of the DRAM-less storage devices. The PLP capacitor is electrically connected to the DRAM-less storage devices and the CXL memory expander, is disposed outside the DRAM-less storage devices, and supplies an auxiliary power voltage to the DRAM-less storage devices and the CXL memory expander in a SPO condition in which an external power voltage is suddenly turned off.