CXL Storage Controller Routing Based on Memory Degradation
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Solution Overview
Problem
Existing computing systems face issues with low bandwidth and high latency in memory access due to the connection of host devices, such as CPUs and GPUs, to semiconductor devices through PCIe protocols, leading to memory sharing and consistency problems.
Innovation Solution
A storage system utilizing a first and second CXL storage device connected through a Compute Express Link (CXL) interface, where each device includes a CXL storage controller and non-volatile memory, with shared memory accessible across devices to monitor and manage degradation, allowing one controller to offload commands to another based on degradation levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If host devices are connected to semiconductor devices through PCIe protocol, then device compatibility and ease of connection are improved, but bandwidth and latency performance deteriorate
Solution Approach 1:
The patent introduces CXL switches as intermediary devices between host devices and storage devices. These switches provide a dedicated high-bandwidth communication path that bypasses the limitations of PCIe protocol, thereby improving bandwidth and latency performance while maintaining the ease of PCIe-based connection and compatibility.
2Speed
If multiple storage devices are connected through CXL interface, then memory access speed and bandwidth are improved, but system complexity increases
Solution Approach 1:
The patent merges the management of multiple storage devices under a unified CXL interface framework. By consolidating control functions and using shared memory resources across multiple storage devices connected through CXL switches, the system achieves high-speed memory access while managing complexity through integration rather than proliferation of separate control mechanisms.
Solution Approach 2:
The CXL interface is designed with multi-functionality to handle various storage operations (read, write, delete commands) and memory management tasks through a single standardized protocol. This universal interface approach allows multiple storage devices to be managed efficiently without requiring device-specific complexity, thereby improving memory access speed while keeping system complexity manageable.
3Reliability
If storage devices monitor degradation levels in real-time, then reliability is improved, but processing overhead and energy consumption increase
Solution Approach 1:
The patent implements preliminary monitoring of degradation levels in shared memory before critical failures occur. By continuously tracking health metrics and predicting potential failures in advance, the system can proactively manage storage reliability and redistribute data loads, thereby improving overall reliability while avoiding the energy-intensive reactive measures of actual failure recovery.
Solution Approach 2:
The system employs feedback mechanisms where degradation information from storage devices is continuously monitored and fed back to the controller. This feedback loop enables intelligent workload distribution, where commands are routed away from degrading storage devices to healthier ones, improving reliability through adaptive management while optimizing energy consumption by avoiding unnecessary operations on failing devices.
4Reliability
If commands are routed based on degradation levels, then system reliability is improved, but command processing complexity increases
Solution Approach 1:
The patent implements dynamic command routing where the system adapts its command distribution strategy based on real-time degradation levels of storage devices. The routing logic dynamically adjusts to current system conditions, redirecting commands away from degrading devices to healthier ones, thereby improving reliability through adaptive behavior while managing complexity through algorithmic automation rather than static complex configurations.
Data Source
AI summary
A storage system includes: a first device connected to a host through an interface including a first and second switches; and a second device connected to the host through the interface. The first device includes: a first controller; a first memory; and a first shared memory including information about a first degradation of the first memory. The second device includes: a second controller; a second memory; and a second shared memory including information about a second degradation of the second memory, the second shared memory being accessible by the first controller through the first switch, and wherein the first controller is configured to: receive a command related to an operation of the first memory from the host, and control the second controller to perform the command, instead of the first controller, based on identifying that the first degradation is higher than the second degradation.