CXL Cache/Mem Protocol Interface Latency Reduction via Epoch Signaling
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Solution Overview
Problem
The Compute Express Link (CXL) Cache/Mem protocol interface (CPI) latency is increased due to the requirement for integrity checks on data transfers, which delays the processing of memory requests until a message authentication code (MAC) is verified, leading to inefficiencies in latency-sensitive operations.
Innovation Solution
The solution involves extending the containment boundary into the device fabric, allowing for pre-processing of memory requests while the MAC integrity check is conducted in parallel, and using modified CPI packet formats to include source epoch information, enabling the fabric to begin processing requests before the integrity check is complete, and adding signals to the CPI Global Layer to notify the fabric of the integrity check status.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MAC integrity check is performed before processing memory requests, then data integrity is ensured, but processing latency increases
Solution Approach 1:
The patent applies preliminary action by performing the MAC integrity check in advance before the memory request reaches the containment point. The link controller validates the integrity of incoming flits and generates the MAC epoch indication ahead of time, allowing the device fabric to process memory requests without waiting for the integrity verification to complete. This resolves the contradiction by ensuring data integrity through preliminary validation while avoiding latency penalties during request processing.
Solution Approach 2:
The patent segments the integrity verification process from the memory request processing path. By separating the MAC check (performed by the link controller) from the memory request handling (performed by the device fabric), the system ensures that integrity validation occurs independently and does not block the main processing path. The segmented architecture allows parallel execution of integrity checks and request processing, reducing overall latency while maintaining reliability.
2Reliability
If containment point is maintained at current position, then security boundaries are preserved, but processing efficiency decreases
Solution Approach 1:
The patent extends the containment boundary into a new dimension - the device fabric itself - rather than keeping it confined to the link controller boundary. This dimensional extension allows the fabric to operate on requests before they would normally cross the containment point, enabling early processing while maintaining security through the epoch indication mechanism. The containment boundary is effectively moved from a spatial constraint to a temporal/logical constraint.
Solution Approach 2:
The patent introduces an intermediary mechanism - the epoch indication signal - that mediates between the link controller's integrity check and the device fabric's request processing. This intermediary carries the security context forward, allowing the fabric to process requests with appropriate security awareness without being blocked by the traditional containment point. The intermediary enables secure early processing by translating integrity verification results into actionable processing permissions.
3Reliability
If MAC epoch indication is used for integrity checking, then security is maintained, but additional processing overhead is introduced
Solution Approach 1:
The patent applies self-service by having the link controller autonomously perform the MAC generation and epoch indication without requiring additional intervention from the device fabric. The link controller independently validates incoming data, generates the epoch indication, and forwards it to the fabric, eliminating the need for the fabric to implement complex integrity verification logic. This self-service approach maintains security while minimizing processing overhead at the fabric level.
Data Source
AI summary
Embodiments herein relate to an electronic device with an interface an interface to communicatively couple with a second electronic device via a communication link, and a link controller. The link controller may be configured to identify, from the second electronic device over the communication link, a flit related to a request from the second electronic device to access a resource of the first electronic device, wherein the flit is an element of a message authentication code (MAC) epoch; generate, based on the flit, a cache/mem interface message related to the request, wherein the cache/mem interface message includes an indication of the MAC epoch; and transmit, to a device fabric of the first electronic device, the cache/mem interface message prior to receipt of a MAC related to the MAC epoch. Other embodiments may be described and/or claimed.