CXL Storage System With Key-Based Stream Access

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Solution Overview

Problem

Existing storage systems face bottlenecks in input/output channels for high-bandwidth applications requiring fast data processing and efficient memory access, particularly in the context of artificial intelligence and edge computing.

Innovation Solution

A storage system utilizing a Compute Express Link (CXL) interface for address translation and synchronization of stream data, enabling efficient storage and retrieval of stream data through a CXL interface by mapping data identifiers and logic block addresses, thereby optimizing data transfer and reducing bottlenecks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional storage systems are used for high-bandwidth applications, then data storage capacity is maintained, but I/O channel bottlenecks occur and data processing speed decreases

Engineering Contradiction:

Improvedata processing speedVSAvoidI/O channel throughput

Core Design Contradiction:

SpeedVSProductivity

Solution Approach 1:

The patent introduces a CXL interface as an intermediary between the host and storage device, enabling address translation and stream data handling. This intermediary layer resolves the bottleneck by providing efficient address mapping and data transfer mechanisms that bypass traditional I/O channel limitations, thereby improving both data processing speed and overall productivity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If stream data is stored without address translation, then storage simplicity is maintained, but access efficiency and data retrieval speed decrease

Engineering Contradiction:

Improvedata retrieval speedVSAvoidaddress translation mechanism

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent implements preliminary address translation by maintaining a mapping between host addresses and device addresses in advance. When stream data is stored or retrieved, the pre-established address translation tables enable rapid data access without real-time address conversion overhead, thus improving data retrieval speed while keeping the complexity manageable through upfront preparation.

Inventive Principle:

Principle #10Preliminary action

3Productivity

If CXL interface with address translation is implemented, then data processing speed and memory access efficiency improve, but system complexity increases

Engineering Contradiction:

Improvememory access efficiencyVSAvoidCXL interface implementation

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The CXL interface is designed to perform multiple functions including address translation, stream data handling, and memory access management within a single unified protocol. This multi-functionality consolidates what would otherwise require separate complex subsystems, thereby improving memory access efficiency while controlling overall system complexity through functional integration.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentEP4641393A1Storage system using compute express link (CXL) interface

Publication Date: 2025.10.29 SAMSUNG ELECTRONICS CO LTD

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AI summary

A storage system includes a host and a storage device. The storage device includes a device memory. The host and the storage device communicate with one another through a CXL interface. The storage device receives an access request including a key value from the host, reads stream data from the device memory based on the key value and transmits the read stream data to the host.