CXL Storage and Memory Map Data Sharing for Scalable Flash Capacity

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Solution Overview

Problem

The increasing capacity of flash memory devices in storage devices necessitates a high-capacity buffer memory to manage the growing amount of map data, leading to increased costs and limitations in existing systems.

Innovation Solution

A system utilizing a Compute Express Link (CXL) interface to arbitrate communications between storage and memory devices, where map data is stored and managed in a separate CXL memory device, alleviating the need for a high-capacity buffer memory within the storage device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacity of flash memory increases, then the storage capacity is improved, but the capacity of map data increases requiring a high-capacity buffer memory which increases costs

Engineering Contradiction:
Improvestorage capacityVSAvoidbuffer memory capacity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent extracts the buffer memory function from the storage device and places it in a separate memory device. The storage device no longer needs to include a high-capacity buffer memory, as map data is stored and managed in the external memory device, thereby reducing the storage device's complexity and cost while maintaining support for high-capacity flash memory

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a separate memory device as an intermediary between the host and the storage device. This memory device acts as a buffer to store map data, enabling the storage device to handle large amounts of data without requiring an integrated high-capacity buffer, thus resolving the contradiction between storage capacity and device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250291514A1Operation method of host configured to communicate with storage devices and memory devices, and system including storage devices and memory devices
Publication Date: 2025.09.18 SAMSUNG ELECTRONICS CO LTD
  • US20250291514A1 patent drawing
  • US20250291514A1 patent drawing
  • US20250291514A1 patent drawing

AI summary

A system includes a first compute express link (CXL) storage device, a second CXL storage device, a first CXL memory device, and a CXL switch connected to the first CXL storage device, the second CXL storage device and the first CXL memory device through a CXL interface, the CXL switch configured to arbitrate communications between the first CXL storage device and the second CXL storage device, and the first CXL memory device. The first CXL memory device is configured to store first map data of the first CXL storage device and second map data of the second CXL storage device, the first CXL storage device is configured to exchange at least a portion of the first map data with the first CXL memory device through the CXL switch, and the second CXL storage device is configured to exchange at least a portion of the second map data with the first CXL memory device through the CXL switch.