CXL Memory Accelerator Command Routing for Near-Memory Computing
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Solution Overview
Problem
Existing memory sub-systems face bottlenecks and latency issues in high-performance computing applications due to data movement between storage and processing units, and vendor-specific command requirements are not adequately addressed, leading to inefficiencies in memory access operations.
Innovation Solution
Implementing a compute express link (CXL) memory device with an accelerator that receives vendor-specific commands via a mailbox interface, allowing for near-memory computing (NMC) and efficient memory access operations through CXL.io, CXL.mem, and CXL.cache protocols, enabling efficient caching and resource sharing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is moved between storage and processing units in existing memory sub-systems, then data can be accessed and processed, but latency and bottlenecks occur reducing performance
Solution Approach 1:
The patent combines storage and processing functions into a single CXL memory device by integrating an accelerator with memory cells, allowing data to be processed in-place without movement between separate storage and processing units, thereby eliminating latency and performance bottlenecks
Solution Approach 2:
The CXL memory device acts as an intermediary between the host system and storage, providing near-memory computing capabilities that reduce the time required for data access and processing by performing computations close to where data is stored
2Adaptability or versatility
If vendor-specific commands are used in existing memory sub-systems, then specific vendor requirements can be met, but system complexity and inefficiency increase
Solution Approach 1:
The CXL memory device implements a universal interface that can handle both standard CXL commands and vendor-specific commands through a unified command processing architecture, allowing multiple functions to be served through a single standardized interface without increasing system complexity
Solution Approach 2:
The memory controller acts as an intermediary that translates and routes vendor-specific commands through the standardized CXL interface, enabling vendor-specific functionality to be supported without compromising the simplicity of the overall system architecture
Data Source
AI summary
A system can include a memory device and a processing device to perform operations including receiving, from a host system, a first command to configure an accelerator associated with the memory device, wherein the first command comprises one or more operations. The operations include identifying, based on metadata associated with the first command, a command type of the first command. The operations further include determining, based on the command type, a first instruction to configure the accelerator to perform the one or more operations comprised by the first command. The operations further include sending, to the accelerator, the first instruction, wherein the one or more operations are to be performed by the accelerator according to the first instruction.