CXL Memory Access for Low-Latency Distributed Database Joins

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Solution Overview

Problem

Traditional database management systems face challenges with high latency and network bottlenecks in data transfer during distributed joins, especially when using remote direct memory access (RDMA) which still has higher latency than local dynamic random access memory (DRAM) access.

Innovation Solution

Implementing Compute Express Link (CXL) for inter-host communication and data exchange in database management systems, leveraging CXL's low-latency, memory-semantic communication to facilitate peer-to-peer communication and shared memory access, reducing latency and bandwidth differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional network-based implementations are used for data exchange in distributed DBMS, then system scalability is achieved, but latency increases and communication efficiency deteriorates

Engineering Contradiction:
Improvesystem scalabilityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent introduces CXL as an intermediary technology between traditional network-based communication and direct memory access. CXL provides a memory-semantic interconnect that mediates data exchange between distributed nodes, enabling low-latency communication while maintaining system scalability. This intermediary layer resolves the contradiction by providing both scalability and low latency characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional network-based mechanical communication systems with a CXL-based memory-semantic interconnect system. This substitution eliminates the need for complex network protocols and reduces latency by directly accessing memory across distributed nodes through CXL, thereby resolving the latency-scalability contradiction.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Power

If remote direct memory access (RDMA) is used for data transfer, then network bandwidth is improved, but latency remains significantly higher than local DRAM access

Engineering Contradiction:
Improvenetwork bandwidthVSAvoidlatency
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The patent changes the fundamental parameters of the interconnect system by transitioning from network-based communication to CXL-based memory-semantic communication. This parameter change enables latency comparable to local DRAM access while maintaining the bandwidth advantages of distributed systems, thereby resolving the bandwidth-latency contradiction.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent makes the CXL interconnect universal by enabling it to serve multiple functions: high-speed data transfer, low-latency communication, and memory-semantic access. This multi-functionality allows the system to achieve both high bandwidth and low latency simultaneously, resolving the contradiction between these two parameters.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If distributed partitioned joins are implemented, then parallel processing capability is improved, but execution cost increases due to network transfer requirements

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidexecution cost
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent uses CXL as an intermediary to enable efficient data exchange during distributed partitioned joins. By providing a low-latency, memory-semantic interconnect, CXL reduces the execution cost of network transfers while maintaining the parallel processing capabilities of distributed joins, thereby resolving the productivity-cost contradiction.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the communication parameter from high-latency network transfers to low-latency CXL memory access. This parameter change enables distributed partitioned joins to execute efficiently with reduced cost, maintaining parallel processing capability while lowering execution costs through faster data transfer.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250348493A1Performing distributed joins using compute express link (CXL) in database management systems
Publication Date: 2025.11.13 ACTIAN CORP
  • US20250348493A1 patent drawing
  • US20250348493A1 patent drawing
  • US20250348493A1 patent drawing

AI summary

Aspects described herein relate to performing a distributed join in a database system using computer express link (CXL) memory. A first host device of multiple host devices can access the CXL memory to obtain data written to the CXL memory by at least a second host device of the multiple host devices. The first host device can perform, based on the obtained data, the distributed join.