CXL Memory Pool Process Migration With Address Space Remapping
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Solution Overview
Problem
Existing migration technologies face challenges in efficiently moving processes between nodes with minimal downtime, load imbalances, and performance bottlenecks, particularly in high-performance computing environments like AI applications, due to the need for full data transmission and hardware unloading.
Innovation Solution
The implementation of a compute express link (CXL) memory pool shared by source and target nodes, where physical pages are downgraded to CXL, metadata is transmitted, and virtual address spaces are reconstructed, allowing efficient migration by mapping physical addresses to virtual address spaces without full data reloading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If system-level migration technology stores and transmits entire virtual memory or container snapshot, then migration can be performed, but data movement volume increases and downtime increases
Solution Approach 1:
The patent segments the memory space into CXL memory pool (for cold data) and local memory (for hot data). During migration, only the virtual address space and metadata are transmitted, while physical pages remain in the CXL memory pool. This segmentation eliminates the need to transmit entire virtual memory, significantly reducing data movement volume and migration downtime.
Solution Approach 2:
The CXL memory pool acts as an intermediary between source and target nodes. Physical pages are downgraded to the shared CXL memory pool before migration, allowing the target node to access them through reconstructed virtual address space without requiring full data transmission. This intermediary mechanism enables efficient migration with minimal data movement.
2Productivity
If process-level migration technology fully unloads host and hardware accelerator data, then migration can be performed, but migration complexity increases
Solution Approach 1:
The patent segments memory access into two paths: hot data accessed via local memory and cold data accessed via CXL memory pool. This segmentation simplifies migration by allowing the target node to reconstruct virtual address space mapping to existing physical pages in CXL memory pool, eliminating the need for full hardware accelerator data unloading and reducing migration complexity.
Solution Approach 2:
Physical pages are downgraded to the CXL memory pool in advance before migration occurs. This preliminary action prepares the target node with pre-positioned physical pages, so during migration only virtual address space and metadata need to be transmitted and reconstructed, significantly simplifying the migration process.
3Loss of energy
If physical pages are downgraded to CXL memory pool, then data movement is minimized, but memory hierarchy complexity increases
Solution Approach 1:
The patent applies local quality by differentiating memory access based on data characteristics: hot data uses local memory with fast access, while cold data uses CXL memory pool with lower cost access. This quality differentiation minimizes data movement energy by keeping frequently accessed data in fast memory and only moving cold data to the CXL pool, while managing memory hierarchy complexity through automated page classification.
Data Source
AI summary
A migration method includes: downgrading, by a source node, a physical page in a local memory corresponding to a process to a physical page of a compute express link (CXL) memory pool having a first physical address; reconstructing, by a target node, a first virtual address space as a second virtual address space; determining, by the target node, a second physical address of the physical page in the CXL memory pool; and mapping, by the target node, the second physical address to the second virtual address space, wherein the CXL memory pool is shared by the source node and the target node, the first physical address is based on a physical address encoding rule of the source node, and the second physical address is based on a physical address encoding rule of the target node.