Shared Memory Security Erase via CXL Allocation Manager
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Solution Overview
Problem
As the amount of computation in computing systems increases, the need for larger storage capacities to manage the resulting data growth becomes essential, while maintaining high performance and avoiding resource limitations.
Innovation Solution
The implementation of a memory system that includes a shared memory device or memory expander, coupled to multiple computing devices via a Compute Express Link (CXL) switch, which utilizes a device allocation manager and security erase circuitry to efficiently allocate and manage memory areas across hosts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a shared memory device is allocated to multiple hosts, then storage capacity and resource utilization are improved, but security risks increase due to potential data leakage between hosts
Solution Approach 1:
The shared memory device is divided into multiple independent memory regions, each allocated to a specific host. The memory management unit maintains allocation information that segments the address space, ensuring that Host 1 can only access its designated region while Host 2 accesses its own region, thereby preventing data leakage while maintaining high storage utilization
Solution Approach 2:
A memory management unit acts as an intermediary between multiple hosts and the shared memory device. This intermediary component intercepts memory access requests, verifies host permissions, and redirects requests to appropriate memory regions, thus eliminating direct host-to-memory security vulnerabilities while enabling multi-host access
2Reliability
If security erase operations are performed on memory regions, then data security is improved, but system performance deteriorates due to operation delays
Solution Approach 1:
The system performs security erase operations in advance when memory regions are released from host allocation, rather than waiting for explicit erase requests. The memory management unit detects release events and automatically triggers erase operations on the freed regions, ensuring security is maintained without requiring performance-critical erase operations during active use
Solution Approach 2:
The memory management unit implements self-service by automatically monitoring allocation status and triggering security erase operations on released memory regions without external intervention. This autonomous approach ensures that security maintenance is integrated into the normal operation flow, eliminating the need for separate performance-costly erase commands from hosts
Data Source
AI summary
A memory system includes at least one memory device that includes memory areas. The memory system includes a device allocation manager and security erase circuitry. The device allocation manager determines which of the memory areas is allocated or released based on a request input from at least one host. The security erase circuitry stores a security erase task for a first memory area, which is associated with a release determined by the device allocation manager, in an erase job queue, and removes the security erase task from the erase job queue when the first memory area is reallocated to a first host to which the first memory area was allocated before the release.